BOOST CAPACITOR SELECTIVELY AND CONCURRENTLY PROVIDING VOLTAGE BOOST TO MULTIPLE ASSIST CIRCUITS IN A MEMORY

An integrated circuit includes a semiconductor substrate and integrated circuitry on the semiconductor substrate. The integrated circuitry includes a static random access memory (SRAM) cell array and a first assist circuit and a differently configured second assist circuit. The first assist circuit is configured to apply a voltage boost to an access line utilized to access the SRAM cell array, and the second assist circuit is configured to apply a voltage boost to a voltage supply rail of the SRAM cell array. A common boost capacitor is coupled to selectively and concurrently provide a voltage boost to both the access line and the power rail via the first and second assist circuits, respectively.