ELECTRONIC CIRCUIT FOR DRIVING A QUANTUM CIRCUIT AND ASSOCIATED QUANTUM COMPUTER

The circuit is connected to the quantum circuit by bias lines and includes a digital-to-analog converter-DAC delivering an analog voltage (Ve); memory cells, connected in parallel at the output of the DAC, each memory cell including a switch (I1, I2, I3, I4) and a capacitor (C1, C2, C3, C4), the cap...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: BILLIOT, Gérard, JADOT, Baptiste, THONNART, Yvain
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator BILLIOT, Gérard
JADOT, Baptiste
THONNART, Yvain
description The circuit is connected to the quantum circuit by bias lines and includes a digital-to-analog converter-DAC delivering an analog voltage (Ve); memory cells, connected in parallel at the output of the DAC, each memory cell including a switch (I1, I2, I3, I4) and a capacitor (C1, C2, C3, C4), the capacitor storing a level of potential at which to maintain a bias line connected to the output of the memory cell; and, a device for generating control signals generating, in synchronization with the DAC, a control signal for each switch of each memory cell, the control signal, a value of the capacitor of a memory cell being selected so as to make negligible a parasitic capacitor affecting the bias line connected to said memory cell and which runs parallel to a neighboring bias line.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024354623A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024354623A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024354623A13</originalsourceid><addsrcrecordid>eNrjZAhw9XF1Dgny9_N0VnD2DHIO9QxRcPMPUnAJ8gzz9HNXcFQIDHX0Cwn1hcs6-rkoOAYH-zt7Ooa4uiCk_X0DQkNcg3gYWNMSc4pTeaE0N4Oym2uIs4duakF-fGpxQWJyal5qSXxosJGBkYmxqYmZkbGjoTFxqgBCcDAq</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>ELECTRONIC CIRCUIT FOR DRIVING A QUANTUM CIRCUIT AND ASSOCIATED QUANTUM COMPUTER</title><source>esp@cenet</source><creator>BILLIOT, Gérard ; JADOT, Baptiste ; THONNART, Yvain</creator><creatorcontrib>BILLIOT, Gérard ; JADOT, Baptiste ; THONNART, Yvain</creatorcontrib><description>The circuit is connected to the quantum circuit by bias lines and includes a digital-to-analog converter-DAC delivering an analog voltage (Ve); memory cells, connected in parallel at the output of the DAC, each memory cell including a switch (I1, I2, I3, I4) and a capacitor (C1, C2, C3, C4), the capacitor storing a level of potential at which to maintain a bias line connected to the output of the memory cell; and, a device for generating control signals generating, in synchronization with the DAC, a control signal for each switch of each memory cell, the control signal, a value of the capacitor of a memory cell being selected so as to make negligible a parasitic capacitor affecting the bias line connected to said memory cell and which runs parallel to a neighboring bias line.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CALCULATING ; CODE CONVERSION IN GENERAL ; CODING ; COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS ; COMPUTING ; COUNTING ; DECODING ; ELECTRICITY ; PHYSICS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20241024&amp;DB=EPODOC&amp;CC=US&amp;NR=2024354623A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20241024&amp;DB=EPODOC&amp;CC=US&amp;NR=2024354623A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BILLIOT, Gérard</creatorcontrib><creatorcontrib>JADOT, Baptiste</creatorcontrib><creatorcontrib>THONNART, Yvain</creatorcontrib><title>ELECTRONIC CIRCUIT FOR DRIVING A QUANTUM CIRCUIT AND ASSOCIATED QUANTUM COMPUTER</title><description>The circuit is connected to the quantum circuit by bias lines and includes a digital-to-analog converter-DAC delivering an analog voltage (Ve); memory cells, connected in parallel at the output of the DAC, each memory cell including a switch (I1, I2, I3, I4) and a capacitor (C1, C2, C3, C4), the capacitor storing a level of potential at which to maintain a bias line connected to the output of the memory cell; and, a device for generating control signals generating, in synchronization with the DAC, a control signal for each switch of each memory cell, the control signal, a value of the capacitor of a memory cell being selected so as to make negligible a parasitic capacitor affecting the bias line connected to said memory cell and which runs parallel to a neighboring bias line.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CALCULATING</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>DECODING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZAhw9XF1Dgny9_N0VnD2DHIO9QxRcPMPUnAJ8gzz9HNXcFQIDHX0Cwn1hcs6-rkoOAYH-zt7Ooa4uiCk_X0DQkNcg3gYWNMSc4pTeaE0N4Oym2uIs4duakF-fGpxQWJyal5qSXxosJGBkYmxqYmZkbGjoTFxqgBCcDAq</recordid><startdate>20241024</startdate><enddate>20241024</enddate><creator>BILLIOT, Gérard</creator><creator>JADOT, Baptiste</creator><creator>THONNART, Yvain</creator><scope>EVB</scope></search><sort><creationdate>20241024</creationdate><title>ELECTRONIC CIRCUIT FOR DRIVING A QUANTUM CIRCUIT AND ASSOCIATED QUANTUM COMPUTER</title><author>BILLIOT, Gérard ; JADOT, Baptiste ; THONNART, Yvain</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024354623A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CALCULATING</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>DECODING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>BILLIOT, Gérard</creatorcontrib><creatorcontrib>JADOT, Baptiste</creatorcontrib><creatorcontrib>THONNART, Yvain</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BILLIOT, Gérard</au><au>JADOT, Baptiste</au><au>THONNART, Yvain</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>ELECTRONIC CIRCUIT FOR DRIVING A QUANTUM CIRCUIT AND ASSOCIATED QUANTUM COMPUTER</title><date>2024-10-24</date><risdate>2024</risdate><abstract>The circuit is connected to the quantum circuit by bias lines and includes a digital-to-analog converter-DAC delivering an analog voltage (Ve); memory cells, connected in parallel at the output of the DAC, each memory cell including a switch (I1, I2, I3, I4) and a capacitor (C1, C2, C3, C4), the capacitor storing a level of potential at which to maintain a bias line connected to the output of the memory cell; and, a device for generating control signals generating, in synchronization with the DAC, a control signal for each switch of each memory cell, the control signal, a value of the capacitor of a memory cell being selected so as to make negligible a parasitic capacitor affecting the bias line connected to said memory cell and which runs parallel to a neighboring bias line.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2024354623A1
source esp@cenet
subjects BASIC ELECTRONIC CIRCUITRY
CALCULATING
CODE CONVERSION IN GENERAL
CODING
COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
COMPUTING
COUNTING
DECODING
ELECTRICITY
PHYSICS
title ELECTRONIC CIRCUIT FOR DRIVING A QUANTUM CIRCUIT AND ASSOCIATED QUANTUM COMPUTER
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-25T00%3A55%3A24IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=BILLIOT,%20G%C3%A9rard&rft.date=2024-10-24&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024354623A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true