METHODS AND APPARATUS TO REDUCE STRESS IN INTEGRATED CIRCUIT PACKAGES

METHODS AND APPARATUS TO REDUCE STRESS IN INTEGRATED CIRCUIT PACKAGES

Systems, apparatus, articles of manufacture, and methods to reduce stress in integrated circuit packages are disclosed. An example semiconductor chip includes: a front surface; a back surface opposite the front surface; a first lateral surface extending between the front surface and the back surface...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Zawadzki, Keith Edward, Deshpande, Nitin Ashok, Arakere, Guruprasad, Kabir, Mohammad Enamul, Karhade, Omkar Gopalkrishna, Krishnatreya, Bhaskar Jyoti, Widodo, Trianggono S
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:Systems, apparatus, articles of manufacture, and methods to reduce stress in integrated circuit packages are disclosed. An example semiconductor chip includes: a front surface; a back surface opposite the front surface; a first lateral surface extending between the front surface and the back surface; a second lateral surface extending between the front surface and the back surface; and a curved fillet at an intersection between the first lateral surface and the second lateral surface.