Adiabatic Stepwise Clock Architecture

Various implementations described herein are directed to a device having a clock driver that provides an adiabatic stepwise clock signal via an output node, and the clock driver may be coupled between a supply voltage and ground. Also, the device may have selectively switched stages with each select...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Dray, Cyrille Nicolas, Normand, Cedric, Alayan, Mouhamad
Format: Patent
Sprache:eng
Schlagworte:
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