INTEGRATED CIRCUIT STRUCTURE WITH BACKSIDE GATE CONNECTION
Integrated circuit structures having backside gate connection are described. In an example, an integrated circuit structure includes a plurality of horizontally stacked nanowires or a fin. A gate stack is over the plurality of horizontally stacked nanowires or the fin. An epitaxial source or drain s...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | MILLS, Shaun KOBRINSKY, Mauro J MANNEBACH, Ehren |
description | Integrated circuit structures having backside gate connection are described. In an example, an integrated circuit structure includes a plurality of horizontally stacked nanowires or a fin. A gate stack is over the plurality of horizontally stacked nanowires or the fin. An epitaxial source or drain structure is at an end of the plurality of horizontally stacked nanowires or the fin. A conductive gate-to-contact connection is vertically beneath the epitaxial source or drain structure and vertically beneath and in electrical contact with the gate stack. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024332077A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024332077A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024332077A13</originalsourceid><addsrcrecordid>eNrjZLDy9AtxdQ9yDHF1UXD2DHIO9QxRCA4JCnUOCQ1yVQj3DPFQcHJ09g72dHFVcAeqUnD29_NzdQ7x9PfjYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBkYmxsZGBubmjobGxKkCAHIgKh8</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>INTEGRATED CIRCUIT STRUCTURE WITH BACKSIDE GATE CONNECTION</title><source>esp@cenet</source><creator>MILLS, Shaun ; KOBRINSKY, Mauro J ; MANNEBACH, Ehren</creator><creatorcontrib>MILLS, Shaun ; KOBRINSKY, Mauro J ; MANNEBACH, Ehren</creatorcontrib><description>Integrated circuit structures having backside gate connection are described. In an example, an integrated circuit structure includes a plurality of horizontally stacked nanowires or a fin. A gate stack is over the plurality of horizontally stacked nanowires or the fin. An epitaxial source or drain structure is at an end of the plurality of horizontally stacked nanowires or the fin. A conductive gate-to-contact connection is vertically beneath the epitaxial source or drain structure and vertically beneath and in electrical contact with the gate stack.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20241003&DB=EPODOC&CC=US&NR=2024332077A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20241003&DB=EPODOC&CC=US&NR=2024332077A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MILLS, Shaun</creatorcontrib><creatorcontrib>KOBRINSKY, Mauro J</creatorcontrib><creatorcontrib>MANNEBACH, Ehren</creatorcontrib><title>INTEGRATED CIRCUIT STRUCTURE WITH BACKSIDE GATE CONNECTION</title><description>Integrated circuit structures having backside gate connection are described. In an example, an integrated circuit structure includes a plurality of horizontally stacked nanowires or a fin. A gate stack is over the plurality of horizontally stacked nanowires or the fin. An epitaxial source or drain structure is at an end of the plurality of horizontally stacked nanowires or the fin. A conductive gate-to-contact connection is vertically beneath the epitaxial source or drain structure and vertically beneath and in electrical contact with the gate stack.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLDy9AtxdQ9yDHF1UXD2DHIO9QxRCA4JCnUOCQ1yVQj3DPFQcHJ09g72dHFVcAeqUnD29_NzdQ7x9PfjYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBkYmxsZGBubmjobGxKkCAHIgKh8</recordid><startdate>20241003</startdate><enddate>20241003</enddate><creator>MILLS, Shaun</creator><creator>KOBRINSKY, Mauro J</creator><creator>MANNEBACH, Ehren</creator><scope>EVB</scope></search><sort><creationdate>20241003</creationdate><title>INTEGRATED CIRCUIT STRUCTURE WITH BACKSIDE GATE CONNECTION</title><author>MILLS, Shaun ; KOBRINSKY, Mauro J ; MANNEBACH, Ehren</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024332077A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>MILLS, Shaun</creatorcontrib><creatorcontrib>KOBRINSKY, Mauro J</creatorcontrib><creatorcontrib>MANNEBACH, Ehren</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MILLS, Shaun</au><au>KOBRINSKY, Mauro J</au><au>MANNEBACH, Ehren</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>INTEGRATED CIRCUIT STRUCTURE WITH BACKSIDE GATE CONNECTION</title><date>2024-10-03</date><risdate>2024</risdate><abstract>Integrated circuit structures having backside gate connection are described. In an example, an integrated circuit structure includes a plurality of horizontally stacked nanowires or a fin. A gate stack is over the plurality of horizontally stacked nanowires or the fin. An epitaxial source or drain structure is at an end of the plurality of horizontally stacked nanowires or the fin. A conductive gate-to-contact connection is vertically beneath the epitaxial source or drain structure and vertically beneath and in electrical contact with the gate stack.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2024332077A1 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | INTEGRATED CIRCUIT STRUCTURE WITH BACKSIDE GATE CONNECTION |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-28T07%3A32%3A52IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MILLS,%20Shaun&rft.date=2024-10-03&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024332077A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |