COMPONENT-EMBEDDED CIRCUIT BOARD

A component-embedded circuit board includes: a first conductive layer in which a high potential side power supply terminal is provided; a second conductive layer in which a low potential side power supply terminal is provided; an insulating layer formed between the first conductive layer and the sec...

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Hauptverfasser: YAMAMOTO, Masayoshi, INADA, Taro, NAGAI, Tomotaka, KOIZUMI, Katsuhiro
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creator YAMAMOTO, Masayoshi
INADA, Taro
NAGAI, Tomotaka
KOIZUMI, Katsuhiro
description A component-embedded circuit board includes: a first conductive layer in which a high potential side power supply terminal is provided; a second conductive layer in which a low potential side power supply terminal is provided; an insulating layer formed between the first conductive layer and the second conductive layer; a first semiconductor element and a second semiconductor element that are embedded in the insulating layer and that each include a high potential side connection terminal and a low potential side connection terminal exposed from the insulating layer; and an intermediate conductor that connects the low potential side connection terminal of the first semiconductor element and the high potential side connection terminal of the second semiconductor element. The first semiconductor element and the second semiconductor element, which are arranged apart in an in-plane direction of the insulating layer, and the intermediate conductor are provided between the first conductive layer and the second conductive layer. The high potential side power supply terminal and the high potential side connection terminal of the first semiconductor element exposed from the insulating layer are connected by the first conductive layer. The low potential side power supply terminal and the low potential side connection terminal of the second semiconductor element exposed from the insulating layer are connected by the second conductive layer. At least one of the first conductive layer or the second conductive layer is configured to have a portion that overlaps the intermediate conductor when viewed from a laminating direction of the first conductive layer and the second conductive layer.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024321764A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024321764A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024321764A13</originalsourceid><addsrcrecordid>eNrjZFBw9vcN8Pdz9QvRdfV1cnVxcXVRcPYMcg71DFFw8ncMcuFhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRibGRobmZiaOhsbEqQIAdg8ivg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>COMPONENT-EMBEDDED CIRCUIT BOARD</title><source>esp@cenet</source><creator>YAMAMOTO, Masayoshi ; INADA, Taro ; NAGAI, Tomotaka ; KOIZUMI, Katsuhiro</creator><creatorcontrib>YAMAMOTO, Masayoshi ; INADA, Taro ; NAGAI, Tomotaka ; KOIZUMI, Katsuhiro</creatorcontrib><description>A component-embedded circuit board includes: a first conductive layer in which a high potential side power supply terminal is provided; a second conductive layer in which a low potential side power supply terminal is provided; an insulating layer formed between the first conductive layer and the second conductive layer; a first semiconductor element and a second semiconductor element that are embedded in the insulating layer and that each include a high potential side connection terminal and a low potential side connection terminal exposed from the insulating layer; and an intermediate conductor that connects the low potential side connection terminal of the first semiconductor element and the high potential side connection terminal of the second semiconductor element. The first semiconductor element and the second semiconductor element, which are arranged apart in an in-plane direction of the insulating layer, and the intermediate conductor are provided between the first conductive layer and the second conductive layer. The high potential side power supply terminal and the high potential side connection terminal of the first semiconductor element exposed from the insulating layer are connected by the first conductive layer. The low potential side power supply terminal and the low potential side connection terminal of the second semiconductor element exposed from the insulating layer are connected by the second conductive layer. At least one of the first conductive layer or the second conductive layer is configured to have a portion that overlaps the intermediate conductor when viewed from a laminating direction of the first conductive layer and the second conductive layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240926&amp;DB=EPODOC&amp;CC=US&amp;NR=2024321764A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240926&amp;DB=EPODOC&amp;CC=US&amp;NR=2024321764A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YAMAMOTO, Masayoshi</creatorcontrib><creatorcontrib>INADA, Taro</creatorcontrib><creatorcontrib>NAGAI, Tomotaka</creatorcontrib><creatorcontrib>KOIZUMI, Katsuhiro</creatorcontrib><title>COMPONENT-EMBEDDED CIRCUIT BOARD</title><description>A component-embedded circuit board includes: a first conductive layer in which a high potential side power supply terminal is provided; a second conductive layer in which a low potential side power supply terminal is provided; an insulating layer formed between the first conductive layer and the second conductive layer; a first semiconductor element and a second semiconductor element that are embedded in the insulating layer and that each include a high potential side connection terminal and a low potential side connection terminal exposed from the insulating layer; and an intermediate conductor that connects the low potential side connection terminal of the first semiconductor element and the high potential side connection terminal of the second semiconductor element. The first semiconductor element and the second semiconductor element, which are arranged apart in an in-plane direction of the insulating layer, and the intermediate conductor are provided between the first conductive layer and the second conductive layer. The high potential side power supply terminal and the high potential side connection terminal of the first semiconductor element exposed from the insulating layer are connected by the first conductive layer. The low potential side power supply terminal and the low potential side connection terminal of the second semiconductor element exposed from the insulating layer are connected by the second conductive layer. At least one of the first conductive layer or the second conductive layer is configured to have a portion that overlaps the intermediate conductor when viewed from a laminating direction of the first conductive layer and the second conductive layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFBw9vcN8Pdz9QvRdfV1cnVxcXVRcPYMcg71DFFw8ncMcuFhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRibGRobmZiaOhsbEqQIAdg8ivg</recordid><startdate>20240926</startdate><enddate>20240926</enddate><creator>YAMAMOTO, Masayoshi</creator><creator>INADA, Taro</creator><creator>NAGAI, Tomotaka</creator><creator>KOIZUMI, Katsuhiro</creator><scope>EVB</scope></search><sort><creationdate>20240926</creationdate><title>COMPONENT-EMBEDDED CIRCUIT BOARD</title><author>YAMAMOTO, Masayoshi ; INADA, Taro ; NAGAI, Tomotaka ; KOIZUMI, Katsuhiro</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024321764A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>YAMAMOTO, Masayoshi</creatorcontrib><creatorcontrib>INADA, Taro</creatorcontrib><creatorcontrib>NAGAI, Tomotaka</creatorcontrib><creatorcontrib>KOIZUMI, Katsuhiro</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YAMAMOTO, Masayoshi</au><au>INADA, Taro</au><au>NAGAI, Tomotaka</au><au>KOIZUMI, Katsuhiro</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>COMPONENT-EMBEDDED CIRCUIT BOARD</title><date>2024-09-26</date><risdate>2024</risdate><abstract>A component-embedded circuit board includes: a first conductive layer in which a high potential side power supply terminal is provided; a second conductive layer in which a low potential side power supply terminal is provided; an insulating layer formed between the first conductive layer and the second conductive layer; a first semiconductor element and a second semiconductor element that are embedded in the insulating layer and that each include a high potential side connection terminal and a low potential side connection terminal exposed from the insulating layer; and an intermediate conductor that connects the low potential side connection terminal of the first semiconductor element and the high potential side connection terminal of the second semiconductor element. The first semiconductor element and the second semiconductor element, which are arranged apart in an in-plane direction of the insulating layer, and the intermediate conductor are provided between the first conductive layer and the second conductive layer. The high potential side power supply terminal and the high potential side connection terminal of the first semiconductor element exposed from the insulating layer are connected by the first conductive layer. The low potential side power supply terminal and the low potential side connection terminal of the second semiconductor element exposed from the insulating layer are connected by the second conductive layer. At least one of the first conductive layer or the second conductive layer is configured to have a portion that overlaps the intermediate conductor when viewed from a laminating direction of the first conductive layer and the second conductive layer.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title COMPONENT-EMBEDDED CIRCUIT BOARD
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-21T07%3A44%3A25IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=YAMAMOTO,%20Masayoshi&rft.date=2024-09-26&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024321764A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true