SIGNAL PROCESSING DEVICE AND VEHICLE COMMUNICATION DEVICE INCLUDING THE SAME
A signal processing device and a vehicle communication device including the same are disclosed. The signal processing device according to an embodiment of the present disclosure includes: a first processor to receive a first message including a sensor signal based on a first communication scheme and...
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| creator | CHO, Chaeguk PARK, Junsang SUNG, Changhun KIM, Hansung KIM, Youngjae CHO, Jaejin KIM, Younggon KIM, Taekyoung CHOI, Jooyoung |
| description | A signal processing device and a vehicle communication device including the same are disclosed. The signal processing device according to an embodiment of the present disclosure includes: a first processor to receive a first message including a sensor signal based on a first communication scheme and to process the received first message; a second processor to receive a second message including a communication message based on a second communication scheme and to process the received second message; and a shared memory to operate to transmit the first message or the second message between the first processor and the second processor, wherein the first processor or the second processor is configured to receive the first message or the second message stored in the shared memory based on an interrupt signal. Accordingly, latency may be reduced and high-speed data transmission may be performed during inter-processor communication. |
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The signal processing device according to an embodiment of the present disclosure includes: a first processor to receive a first message including a sensor signal based on a first communication scheme and to process the received first message; a second processor to receive a second message including a communication message based on a second communication scheme and to process the received second message; and a shared memory to operate to transmit the first message or the second message between the first processor and the second processor, wherein the first processor or the second processor is configured to receive the first message or the second message stored in the shared memory based on an interrupt signal. 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Accordingly, latency may be reduced and high-speed data transmission may be performed during inter-processor communication.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAJ9nT3c_RRCAjyd3YNDvb0c1dwcQ3zdHZVcPRzUQhz9fB09nFVcPb39Q3183R2DPH094Mp8PRz9gl1AekI8XBVCHb0deVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRibGRgYGZhaOhsbEqQIAXIYupQ</recordid><startdate>20240926</startdate><enddate>20240926</enddate><creator>CHO, Chaeguk</creator><creator>PARK, Junsang</creator><creator>SUNG, Changhun</creator><creator>KIM, Hansung</creator><creator>KIM, Youngjae</creator><creator>CHO, Jaejin</creator><creator>KIM, Younggon</creator><creator>KIM, Taekyoung</creator><creator>CHOI, Jooyoung</creator><scope>EVB</scope></search><sort><creationdate>20240926</creationdate><title>SIGNAL PROCESSING DEVICE AND VEHICLE COMMUNICATION DEVICE INCLUDING THE SAME</title><author>CHO, Chaeguk ; PARK, Junsang ; SUNG, Changhun ; KIM, Hansung ; KIM, Youngjae ; CHO, Jaejin ; KIM, Younggon ; KIM, Taekyoung ; CHOI, Jooyoung</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024320068A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>CHO, Chaeguk</creatorcontrib><creatorcontrib>PARK, Junsang</creatorcontrib><creatorcontrib>SUNG, Changhun</creatorcontrib><creatorcontrib>KIM, Hansung</creatorcontrib><creatorcontrib>KIM, Youngjae</creatorcontrib><creatorcontrib>CHO, Jaejin</creatorcontrib><creatorcontrib>KIM, Younggon</creatorcontrib><creatorcontrib>KIM, Taekyoung</creatorcontrib><creatorcontrib>CHOI, Jooyoung</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHO, Chaeguk</au><au>PARK, Junsang</au><au>SUNG, Changhun</au><au>KIM, Hansung</au><au>KIM, Youngjae</au><au>CHO, Jaejin</au><au>KIM, Younggon</au><au>KIM, Taekyoung</au><au>CHOI, Jooyoung</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SIGNAL PROCESSING DEVICE AND VEHICLE COMMUNICATION DEVICE INCLUDING THE SAME</title><date>2024-09-26</date><risdate>2024</risdate><abstract>A signal processing device and a vehicle communication device including the same are disclosed. The signal processing device according to an embodiment of the present disclosure includes: a first processor to receive a first message including a sensor signal based on a first communication scheme and to process the received first message; a second processor to receive a second message including a communication message based on a second communication scheme and to process the received second message; and a shared memory to operate to transmit the first message or the second message between the first processor and the second processor, wherein the first processor or the second processor is configured to receive the first message or the second message stored in the shared memory based on an interrupt signal. Accordingly, latency may be reduced and high-speed data transmission may be performed during inter-processor communication.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | SIGNAL PROCESSING DEVICE AND VEHICLE COMMUNICATION DEVICE INCLUDING THE SAME |
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