SEMICONDUCTOR STRUCTURE WITH ISOLATION REGION INCLUDING COMBINATION OF DEEP AND SHALLOW TRENCH ISOLATION STRUCTURES AND METHOD

Disclosed is a semiconductor structure and method of forming the semiconductor structure. Specifically, the semiconductor structure can include a first semiconductor fin extending from a semiconductor substrate. The semiconductor structure can further include an isolation region on the semiconductor...

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Hauptverfasser: Yu, Hong, Kozarsky, Eric Scott, Tokranov, Anton V, Mazza, James P, Strehlow, Elizabeth A, Vulcano Rossi, Vitor A
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creator Yu, Hong
Kozarsky, Eric Scott
Tokranov, Anton V
Mazza, James P
Strehlow, Elizabeth A
Vulcano Rossi, Vitor A
description Disclosed is a semiconductor structure and method of forming the semiconductor structure. Specifically, the semiconductor structure can include a first semiconductor fin extending from a semiconductor substrate. The semiconductor structure can further include an isolation region on the semiconductor substrate adjacent to a lower portion of the first semiconductor fin. The first semiconductor fin can, for example, be incorporated into a single-fin fin-type semiconductor device, such as a single-fin fin-type field effect transistor (FINFET). The isolation region can include at least one shallow trench isolation (STI) structure positioned laterally between and immediately adjacent to sections of a deep trench isolation (DTI) structure. With this alternating DTI-STI-DTI configuration, overall shrinkage of isolation material of the isolation region during anneals is reduced and, thus, so are stress-induced crystalline defects in the first semiconductor fin. Also disclosed are methods for forming such a semiconductor structure.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SEMICONDUCTOR STRUCTURE WITH ISOLATION REGION INCLUDING COMBINATION OF DEEP AND SHALLOW TRENCH ISOLATION STRUCTURES AND METHOD
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