MULTI-PORT QUEUEING CACHE AND DATA PROCESSING SYSTEM INCLUDING THE SAME
In some embodiments, a multi-port queueing cache includes a plurality of first ports, a plurality of second ports, a plurality of request handlers respectively coupled to the plurality of first ports, a cache storage unit coupled to the plurality of second ports, a reserve interface configured to ex...
Gespeichert in:
| Hauptverfasser: | , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | LEE, Heonsoo Chung, Jaehun Park, Junseok Hong, Byungchul |
| description | In some embodiments, a multi-port queueing cache includes a plurality of first ports, a plurality of second ports, a plurality of request handlers respectively coupled to the plurality of first ports, a cache storage unit coupled to the plurality of second ports, a reserve interface configured to exchange at least one address and at least one reserved cache line number, and a request interface configured to exchange the at least one reserved cache line number and at least one data. The reserve interface and the request interface are disposed between the plurality of request handlers and the cache storage unit. The cache storage unit includes a plurality of cache lines configured to store the plurality of data. The cache storage unit is configured to output a portion of the plurality of addresses, and receive a portion of the plurality of data corresponding to the portion of the plurality of addresses. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024289278A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024289278A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024289278A13</originalsourceid><addsrcrecordid>eNrjZHD3DfUJ8dQN8A8KUQgMdQ119fRzV3B2dPZwVXD0c1FwcQxxVAgI8nd2DQ4GyQRHBoe4-ip4-jn7hLqABEKACoMdfV15GFjTEnOKU3mhNDeDsptriLOHbmpBfnxqcUFicmpeakl8aLCRgZGJkYWlkbmFo6ExcaoAhtEtgQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MULTI-PORT QUEUEING CACHE AND DATA PROCESSING SYSTEM INCLUDING THE SAME</title><source>esp@cenet</source><creator>LEE, Heonsoo ; Chung, Jaehun ; Park, Junseok ; Hong, Byungchul</creator><creatorcontrib>LEE, Heonsoo ; Chung, Jaehun ; Park, Junseok ; Hong, Byungchul</creatorcontrib><description>In some embodiments, a multi-port queueing cache includes a plurality of first ports, a plurality of second ports, a plurality of request handlers respectively coupled to the plurality of first ports, a cache storage unit coupled to the plurality of second ports, a reserve interface configured to exchange at least one address and at least one reserved cache line number, and a request interface configured to exchange the at least one reserved cache line number and at least one data. The reserve interface and the request interface are disposed between the plurality of request handlers and the cache storage unit. The cache storage unit includes a plurality of cache lines configured to store the plurality of data. The cache storage unit is configured to output a portion of the plurality of addresses, and receive a portion of the plurality of data corresponding to the portion of the plurality of addresses.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240829&DB=EPODOC&CC=US&NR=2024289278A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240829&DB=EPODOC&CC=US&NR=2024289278A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LEE, Heonsoo</creatorcontrib><creatorcontrib>Chung, Jaehun</creatorcontrib><creatorcontrib>Park, Junseok</creatorcontrib><creatorcontrib>Hong, Byungchul</creatorcontrib><title>MULTI-PORT QUEUEING CACHE AND DATA PROCESSING SYSTEM INCLUDING THE SAME</title><description>In some embodiments, a multi-port queueing cache includes a plurality of first ports, a plurality of second ports, a plurality of request handlers respectively coupled to the plurality of first ports, a cache storage unit coupled to the plurality of second ports, a reserve interface configured to exchange at least one address and at least one reserved cache line number, and a request interface configured to exchange the at least one reserved cache line number and at least one data. The reserve interface and the request interface are disposed between the plurality of request handlers and the cache storage unit. The cache storage unit includes a plurality of cache lines configured to store the plurality of data. The cache storage unit is configured to output a portion of the plurality of addresses, and receive a portion of the plurality of data corresponding to the portion of the plurality of addresses.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHD3DfUJ8dQN8A8KUQgMdQ119fRzV3B2dPZwVXD0c1FwcQxxVAgI8nd2DQ4GyQRHBoe4-ip4-jn7hLqABEKACoMdfV15GFjTEnOKU3mhNDeDsptriLOHbmpBfnxqcUFicmpeakl8aLCRgZGJkYWlkbmFo6ExcaoAhtEtgQ</recordid><startdate>20240829</startdate><enddate>20240829</enddate><creator>LEE, Heonsoo</creator><creator>Chung, Jaehun</creator><creator>Park, Junseok</creator><creator>Hong, Byungchul</creator><scope>EVB</scope></search><sort><creationdate>20240829</creationdate><title>MULTI-PORT QUEUEING CACHE AND DATA PROCESSING SYSTEM INCLUDING THE SAME</title><author>LEE, Heonsoo ; Chung, Jaehun ; Park, Junseok ; Hong, Byungchul</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024289278A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>LEE, Heonsoo</creatorcontrib><creatorcontrib>Chung, Jaehun</creatorcontrib><creatorcontrib>Park, Junseok</creatorcontrib><creatorcontrib>Hong, Byungchul</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LEE, Heonsoo</au><au>Chung, Jaehun</au><au>Park, Junseok</au><au>Hong, Byungchul</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MULTI-PORT QUEUEING CACHE AND DATA PROCESSING SYSTEM INCLUDING THE SAME</title><date>2024-08-29</date><risdate>2024</risdate><abstract>In some embodiments, a multi-port queueing cache includes a plurality of first ports, a plurality of second ports, a plurality of request handlers respectively coupled to the plurality of first ports, a cache storage unit coupled to the plurality of second ports, a reserve interface configured to exchange at least one address and at least one reserved cache line number, and a request interface configured to exchange the at least one reserved cache line number and at least one data. The reserve interface and the request interface are disposed between the plurality of request handlers and the cache storage unit. The cache storage unit includes a plurality of cache lines configured to store the plurality of data. The cache storage unit is configured to output a portion of the plurality of addresses, and receive a portion of the plurality of data corresponding to the portion of the plurality of addresses.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US2024289278A1 |
| source | esp@cenet |
| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | MULTI-PORT QUEUEING CACHE AND DATA PROCESSING SYSTEM INCLUDING THE SAME |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-19T11%3A49%3A54IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LEE,%20Heonsoo&rft.date=2024-08-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024289278A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |