PATTERN FORMING METHOD, SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF MANUFACTURING THE SAME
A method of forming a pattern includes forming an etch target layer over a substrate including a first area and a second area, forming a hardmask structure over the etch target layer, forming a photoresist pattern including a first photoresist pattern including an engraved pattern located in the fir...
Gespeichert in:
| Hauptverfasser: | , , , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Lee, Wonchul Kim, Kanguk Lee, Donghwan Kim, Seokhyun |
| description | A method of forming a pattern includes forming an etch target layer over a substrate including a first area and a second area, forming a hardmask structure over the etch target layer, forming a photoresist pattern including a first photoresist pattern including an engraved pattern located in the first area and a second photoresist pattern including an embossed pattern located in the second area, forming an upper hardmask pattern including a plurality of openings, forming a reversible hardmask pattern filling the plurality of openings in the first area, and forming a feature pattern including a first pattern located in the first area and a second pattern located in the second area, wherein the first pattern includes a plurality of island patterns and a dam structure planarly surrounding the plurality of island patterns. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024266170A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024266170A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024266170A13</originalsourceid><addsrcrecordid>eNqNjLEKwjAUALM4iPoPD1wrtFHqHJIXkyGJJC-FTqVInEQL9f9RoR_gdHAct2b9VRBh9KBDdNZfwCGZoCpI6KwMXmVJIX6tC7EHhZ2VWIHwagkhaHDCZy0k5fgbkEFIwuGWre7jYy67hRu210jSHMr0Gso8jbfyLO8hJ17zE2_b5lyL5vhf9QHc1DJF</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>PATTERN FORMING METHOD, SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF MANUFACTURING THE SAME</title><source>esp@cenet</source><creator>Lee, Wonchul ; Kim, Kanguk ; Lee, Donghwan ; Kim, Seokhyun</creator><creatorcontrib>Lee, Wonchul ; Kim, Kanguk ; Lee, Donghwan ; Kim, Seokhyun</creatorcontrib><description>A method of forming a pattern includes forming an etch target layer over a substrate including a first area and a second area, forming a hardmask structure over the etch target layer, forming a photoresist pattern including a first photoresist pattern including an engraved pattern located in the first area and a second photoresist pattern including an embossed pattern located in the second area, forming an upper hardmask pattern including a plurality of openings, forming a reversible hardmask pattern filling the plurality of openings in the first area, and forming a feature pattern including a first pattern located in the first area and a second pattern located in the second area, wherein the first pattern includes a plurality of island patterns and a dam structure planarly surrounding the plurality of island patterns.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240808&DB=EPODOC&CC=US&NR=2024266170A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240808&DB=EPODOC&CC=US&NR=2024266170A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Lee, Wonchul</creatorcontrib><creatorcontrib>Kim, Kanguk</creatorcontrib><creatorcontrib>Lee, Donghwan</creatorcontrib><creatorcontrib>Kim, Seokhyun</creatorcontrib><title>PATTERN FORMING METHOD, SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF MANUFACTURING THE SAME</title><description>A method of forming a pattern includes forming an etch target layer over a substrate including a first area and a second area, forming a hardmask structure over the etch target layer, forming a photoresist pattern including a first photoresist pattern including an engraved pattern located in the first area and a second photoresist pattern including an embossed pattern located in the second area, forming an upper hardmask pattern including a plurality of openings, forming a reversible hardmask pattern filling the plurality of openings in the first area, and forming a feature pattern including a first pattern located in the first area and a second pattern located in the second area, wherein the first pattern includes a plurality of island patterns and a dam structure planarly surrounding the plurality of island patterns.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjLEKwjAUALM4iPoPD1wrtFHqHJIXkyGJJC-FTqVInEQL9f9RoR_gdHAct2b9VRBh9KBDdNZfwCGZoCpI6KwMXmVJIX6tC7EHhZ2VWIHwagkhaHDCZy0k5fgbkEFIwuGWre7jYy67hRu210jSHMr0Gso8jbfyLO8hJ17zE2_b5lyL5vhf9QHc1DJF</recordid><startdate>20240808</startdate><enddate>20240808</enddate><creator>Lee, Wonchul</creator><creator>Kim, Kanguk</creator><creator>Lee, Donghwan</creator><creator>Kim, Seokhyun</creator><scope>EVB</scope></search><sort><creationdate>20240808</creationdate><title>PATTERN FORMING METHOD, SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF MANUFACTURING THE SAME</title><author>Lee, Wonchul ; Kim, Kanguk ; Lee, Donghwan ; Kim, Seokhyun</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024266170A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Lee, Wonchul</creatorcontrib><creatorcontrib>Kim, Kanguk</creatorcontrib><creatorcontrib>Lee, Donghwan</creatorcontrib><creatorcontrib>Kim, Seokhyun</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Lee, Wonchul</au><au>Kim, Kanguk</au><au>Lee, Donghwan</au><au>Kim, Seokhyun</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>PATTERN FORMING METHOD, SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF MANUFACTURING THE SAME</title><date>2024-08-08</date><risdate>2024</risdate><abstract>A method of forming a pattern includes forming an etch target layer over a substrate including a first area and a second area, forming a hardmask structure over the etch target layer, forming a photoresist pattern including a first photoresist pattern including an engraved pattern located in the first area and a second photoresist pattern including an embossed pattern located in the second area, forming an upper hardmask pattern including a plurality of openings, forming a reversible hardmask pattern filling the plurality of openings in the first area, and forming a feature pattern including a first pattern located in the first area and a second pattern located in the second area, wherein the first pattern includes a plurality of island patterns and a dam structure planarly surrounding the plurality of island patterns.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US2024266170A1 |
| source | esp@cenet |
| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | PATTERN FORMING METHOD, SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF MANUFACTURING THE SAME |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-03T17%3A00%3A33IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Lee,%20Wonchul&rft.date=2024-08-08&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024266170A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |