MOLDED MEMORY ASSEMBLIES FOR A SYSTEM IN PACKAGE SEMICONDUCTOR DEVICE ASSEMBLY

Implementations described herein relate to various semiconductor device assemblies. In some implementations, a molded memory device may include multiple stacked NAND dies electrically coupled to one another via multiple wire bonds. The molded memory device may include a molded casing surrounding the multiple stacked NAND dies and encapsulating the multiple wire bonds, with the molded casing including a first mold surrounding a first portion of a first NAND die, of the multiple stacked NAND dies, and a second mold partially surrounding a second portion of the first NAND die and each additional NAND die, of the multiple NAND dies. The molded memory device may include multiple copper contacts configured to couple the molded memory device to a substrate associated with a system in package, with the plurality of copper contacts being disposed in the first mold.