SEMICONDUCTOR DEVICES AND MANUFACTURING METHODS FOR THE SAME

A semiconductor device includes a substrate having an active region defined by a device separation layer, a plurality of bit lines on the substrate, a buried contact disposed on the substrate between adjacent bit lines among the plurality of bit lines and connected to the active region, an intermedi...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Noh, Halim, Bae, Sunghoon, Shin, Heecheol, EOM, Taeyoung
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Noh, Halim
Bae, Sunghoon
Shin, Heecheol
EOM, Taeyoung
description A semiconductor device includes a substrate having an active region defined by a device separation layer, a plurality of bit lines on the substrate, a buried contact disposed on the substrate between adjacent bit lines among the plurality of bit lines and connected to the active region, an intermediate conductive layer disposed on the buried contact, a landing pad disposed on the intermediate conductive layer, and an insulating pattern on a sidewall of the landing pad and contacting at least a portion of a top surface of the intermediate conductive layer.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024260256A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024260256A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024260256A13</originalsourceid><addsrcrecordid>eNrjZLAJdvX1dPb3cwl1DvEPUnBxDfN0dg1WcPRzUfB19At1c3QOCQ3y9HNX8HUN8fB3CVZwA6oK8XBVCHb0deVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRiZGZgZGpmaOhsbEqQIAtCkqfA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICES AND MANUFACTURING METHODS FOR THE SAME</title><source>esp@cenet</source><creator>Noh, Halim ; Bae, Sunghoon ; Shin, Heecheol ; EOM, Taeyoung</creator><creatorcontrib>Noh, Halim ; Bae, Sunghoon ; Shin, Heecheol ; EOM, Taeyoung</creatorcontrib><description>A semiconductor device includes a substrate having an active region defined by a device separation layer, a plurality of bit lines on the substrate, a buried contact disposed on the substrate between adjacent bit lines among the plurality of bit lines and connected to the active region, an intermediate conductive layer disposed on the buried contact, a landing pad disposed on the intermediate conductive layer, and an insulating pattern on a sidewall of the landing pad and contacting at least a portion of a top surface of the intermediate conductive layer.</description><language>eng</language><subject>ELECTRICITY</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240801&amp;DB=EPODOC&amp;CC=US&amp;NR=2024260256A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240801&amp;DB=EPODOC&amp;CC=US&amp;NR=2024260256A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Noh, Halim</creatorcontrib><creatorcontrib>Bae, Sunghoon</creatorcontrib><creatorcontrib>Shin, Heecheol</creatorcontrib><creatorcontrib>EOM, Taeyoung</creatorcontrib><title>SEMICONDUCTOR DEVICES AND MANUFACTURING METHODS FOR THE SAME</title><description>A semiconductor device includes a substrate having an active region defined by a device separation layer, a plurality of bit lines on the substrate, a buried contact disposed on the substrate between adjacent bit lines among the plurality of bit lines and connected to the active region, an intermediate conductive layer disposed on the buried contact, a landing pad disposed on the intermediate conductive layer, and an insulating pattern on a sidewall of the landing pad and contacting at least a portion of a top surface of the intermediate conductive layer.</description><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAJdvX1dPb3cwl1DvEPUnBxDfN0dg1WcPRzUfB19At1c3QOCQ3y9HNX8HUN8fB3CVZwA6oK8XBVCHb0deVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRiZGZgZGpmaOhsbEqQIAtCkqfA</recordid><startdate>20240801</startdate><enddate>20240801</enddate><creator>Noh, Halim</creator><creator>Bae, Sunghoon</creator><creator>Shin, Heecheol</creator><creator>EOM, Taeyoung</creator><scope>EVB</scope></search><sort><creationdate>20240801</creationdate><title>SEMICONDUCTOR DEVICES AND MANUFACTURING METHODS FOR THE SAME</title><author>Noh, Halim ; Bae, Sunghoon ; Shin, Heecheol ; EOM, Taeyoung</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024260256A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>Noh, Halim</creatorcontrib><creatorcontrib>Bae, Sunghoon</creatorcontrib><creatorcontrib>Shin, Heecheol</creatorcontrib><creatorcontrib>EOM, Taeyoung</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Noh, Halim</au><au>Bae, Sunghoon</au><au>Shin, Heecheol</au><au>EOM, Taeyoung</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICES AND MANUFACTURING METHODS FOR THE SAME</title><date>2024-08-01</date><risdate>2024</risdate><abstract>A semiconductor device includes a substrate having an active region defined by a device separation layer, a plurality of bit lines on the substrate, a buried contact disposed on the substrate between adjacent bit lines among the plurality of bit lines and connected to the active region, an intermediate conductive layer disposed on the buried contact, a landing pad disposed on the intermediate conductive layer, and an insulating pattern on a sidewall of the landing pad and contacting at least a portion of a top surface of the intermediate conductive layer.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2024260256A1
source esp@cenet
subjects ELECTRICITY
title SEMICONDUCTOR DEVICES AND MANUFACTURING METHODS FOR THE SAME
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-03T13%3A02%3A33IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Noh,%20Halim&rft.date=2024-08-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024260256A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true