SEMICONDUCTOR PACKAGE

A semiconductor package includes a first semiconductor chip including a substrate having a front surface and an opposite rear surface, a rear protective layer on the rear surface, a plurality of first and second rear through-vias penetrating through the rear protective layer and extending into the substrate, a plurality of front through-vias extending from the front surface and connected to the first rear through-vias, and a plurality of rear pads on the rear protective layer and connected to the plurality of first and second rear through-vias. A second semiconductor chip is on the first semiconductor chip, and includes a plurality of front pads electrically connected to the plurality of rear pads by respective bump structures. Each of the plurality of rear through-vias has a width greater than a width of each of the plurality of front through-vias.