QUADRATURE ERROR CORRECTION CIRCUIT AND MEMORY DEVICE HAVING THE SAME

The memory device includes a clock receiver receiving an external clock signal, a transmitter receiving first to Nth data in parallel and sequentially outputting the first to Nth data based on first to Nth clock signals including different phases, and a QEC circuit correcting a skew between the firs...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Kim, Joohwan, Cho, Hyunyoon, Choi, Junghwan, Park, Junyoung, Byun, Jindo, Shin, Eunseok
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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