METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH SOURCE/DRAIN STRUCTURE HAVING MODIFIED SHAPE

METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH SOURCE/DRAIN STRUCTURE HAVING MODIFIED SHAPE

Semiconductor structures and method for forming the same are provide. The method includes forming a fin structure extending in a first direction over a substrate and forming spacers on sidewalls of the fin structure to laterally sandwiched the fin structure in a second direction. The method further...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: MORE, Shahaji B, YANG, Huai-Tei, CHANG, Shih-Chieh, LEE, Cheng-Han
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator MORE, Shahaji B
YANG, Huai-Tei
CHANG, Shih-Chieh
LEE, Cheng-Han
description Semiconductor structures and method for forming the same are provide. The method includes forming a fin structure extending in a first direction over a substrate and forming spacers on sidewalls of the fin structure to laterally sandwiched the fin structure in a second direction. The method further includes etching the fin structure in a third direction to form a recess between the spacers and forming a doped region in the fin structure exposed by the recess. The method further includes removing an upper portion of the doped region and annealing a bottom portion of the doped region after removing the upper portion of the doped region. The method further includes forming a source/drain structure over the bottom portion of the doped region.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024234548A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024234548A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024234548A13</originalsourceid><addsrcrecordid>eNqNyzELAiEYxnGXhqi-wwvNUXkGraKv6aCG-tZ4XGFT1MH1_amDhsamZ_g9_ym7eCw2ajAxgZeBjFSFkgsHyOidikGTKh_LJdEoCGdXLORISeFaJ-nCj1l5GlMftTMONWQrjzhnk1t3H-riuzO2NFiUXdX-2dah7671UV8tZb7hgjdiJ_Zy2_z3egMd6jWX</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH SOURCE/DRAIN STRUCTURE HAVING MODIFIED SHAPE</title><source>esp@cenet</source><creator>MORE, Shahaji B ; YANG, Huai-Tei ; CHANG, Shih-Chieh ; LEE, Cheng-Han</creator><creatorcontrib>MORE, Shahaji B ; YANG, Huai-Tei ; CHANG, Shih-Chieh ; LEE, Cheng-Han</creatorcontrib><description>Semiconductor structures and method for forming the same are provide. The method includes forming a fin structure extending in a first direction over a substrate and forming spacers on sidewalls of the fin structure to laterally sandwiched the fin structure in a second direction. The method further includes etching the fin structure in a third direction to form a recess between the spacers and forming a doped region in the fin structure exposed by the recess. The method further includes removing an upper portion of the doped region and annealing a bottom portion of the doped region after removing the upper portion of the doped region. The method further includes forming a source/drain structure over the bottom portion of the doped region.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240711&amp;DB=EPODOC&amp;CC=US&amp;NR=2024234548A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240711&amp;DB=EPODOC&amp;CC=US&amp;NR=2024234548A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MORE, Shahaji B</creatorcontrib><creatorcontrib>YANG, Huai-Tei</creatorcontrib><creatorcontrib>CHANG, Shih-Chieh</creatorcontrib><creatorcontrib>LEE, Cheng-Han</creatorcontrib><title>METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH SOURCE/DRAIN STRUCTURE HAVING MODIFIED SHAPE</title><description>Semiconductor structures and method for forming the same are provide. The method includes forming a fin structure extending in a first direction over a substrate and forming spacers on sidewalls of the fin structure to laterally sandwiched the fin structure in a second direction. The method further includes etching the fin structure in a third direction to form a recess between the spacers and forming a doped region in the fin structure exposed by the recess. The method further includes removing an upper portion of the doped region and annealing a bottom portion of the doped region after removing the upper portion of the doped region. The method further includes forming a source/drain structure over the bottom portion of the doped region.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyzELAiEYxnGXhqi-wwvNUXkGraKv6aCG-tZ4XGFT1MH1_amDhsamZ_g9_ym7eCw2ajAxgZeBjFSFkgsHyOidikGTKh_LJdEoCGdXLORISeFaJ-nCj1l5GlMftTMONWQrjzhnk1t3H-riuzO2NFiUXdX-2dah7671UV8tZb7hgjdiJ_Zy2_z3egMd6jWX</recordid><startdate>20240711</startdate><enddate>20240711</enddate><creator>MORE, Shahaji B</creator><creator>YANG, Huai-Tei</creator><creator>CHANG, Shih-Chieh</creator><creator>LEE, Cheng-Han</creator><scope>EVB</scope></search><sort><creationdate>20240711</creationdate><title>METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH SOURCE/DRAIN STRUCTURE HAVING MODIFIED SHAPE</title><author>MORE, Shahaji B ; YANG, Huai-Tei ; CHANG, Shih-Chieh ; LEE, Cheng-Han</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024234548A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>MORE, Shahaji B</creatorcontrib><creatorcontrib>YANG, Huai-Tei</creatorcontrib><creatorcontrib>CHANG, Shih-Chieh</creatorcontrib><creatorcontrib>LEE, Cheng-Han</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MORE, Shahaji B</au><au>YANG, Huai-Tei</au><au>CHANG, Shih-Chieh</au><au>LEE, Cheng-Han</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH SOURCE/DRAIN STRUCTURE HAVING MODIFIED SHAPE</title><date>2024-07-11</date><risdate>2024</risdate><abstract>Semiconductor structures and method for forming the same are provide. The method includes forming a fin structure extending in a first direction over a substrate and forming spacers on sidewalls of the fin structure to laterally sandwiched the fin structure in a second direction. The method further includes etching the fin structure in a third direction to form a recess between the spacers and forming a doped region in the fin structure exposed by the recess. The method further includes removing an upper portion of the doped region and annealing a bottom portion of the doped region after removing the upper portion of the doped region. The method further includes forming a source/drain structure over the bottom portion of the doped region.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2024234548A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH SOURCE/DRAIN STRUCTURE HAVING MODIFIED SHAPE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-30T23%3A24%3A20IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=MORE,%20Shahaji%20B&rft.date=2024-07-11&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024234548A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true