Memory Circuitry And Method Used In Forming Memory Circuitry

A method used in forming memory circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers directly above a conductor tier. The first tiers comprise sacrificial material and the second tiers comprise non-sacrificial material that is of different composition fr...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Saxler, Adam W, Li, Andrew, Hopkins, John D, Gupta, Sidhartha
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Saxler, Adam W
Li, Andrew
Hopkins, John D
Gupta, Sidhartha
description A method used in forming memory circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers directly above a conductor tier. The first tiers comprise sacrificial material and the second tiers comprise non-sacrificial material that is of different composition from that of the sacrificial material. The stack comprises horizontally-elongated trenches extending through the first tiers and the second tiers and are individually between immediately-laterally-adjacent memory-block regions. Channel-material strings are formed that extend through the first and second tiers in the memory-block regions. Through the horizontally-elongated trenches, the sacrificial material is replaced with conductive material that comprises control-gate lines in the memory-block regions. After the replacing, conducting material is formed in a lowest of the first tiers and directly electrically couples together the channel material of the channel-material strings and conductor material of the conductor tier. Other embodiments, including structure, are disclosed.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024206175A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024206175A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024206175A13</originalsourceid><addsrcrecordid>eNrjZLDxTc3NL6pUcM4sSi7NLAGyHPNSFHxTSzLyUxRCi1NTFDzzFNzyi3Iz89IV0NXyMLCmJeYUp_JCaW4GZTfXEGcP3dSC_PjU4oLE5NS81JL40GAjAyMTIwMzQ3NTR0Nj4lQBAE9kMA0</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Memory Circuitry And Method Used In Forming Memory Circuitry</title><source>esp@cenet</source><creator>Saxler, Adam W ; Li, Andrew ; Hopkins, John D ; Gupta, Sidhartha</creator><creatorcontrib>Saxler, Adam W ; Li, Andrew ; Hopkins, John D ; Gupta, Sidhartha</creatorcontrib><description>A method used in forming memory circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers directly above a conductor tier. The first tiers comprise sacrificial material and the second tiers comprise non-sacrificial material that is of different composition from that of the sacrificial material. The stack comprises horizontally-elongated trenches extending through the first tiers and the second tiers and are individually between immediately-laterally-adjacent memory-block regions. Channel-material strings are formed that extend through the first and second tiers in the memory-block regions. Through the horizontally-elongated trenches, the sacrificial material is replaced with conductive material that comprises control-gate lines in the memory-block regions. After the replacing, conducting material is formed in a lowest of the first tiers and directly electrically couples together the channel material of the channel-material strings and conductor material of the conductor tier. Other embodiments, including structure, are disclosed.</description><language>eng</language><subject>ELECTRICITY</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240620&amp;DB=EPODOC&amp;CC=US&amp;NR=2024206175A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240620&amp;DB=EPODOC&amp;CC=US&amp;NR=2024206175A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Saxler, Adam W</creatorcontrib><creatorcontrib>Li, Andrew</creatorcontrib><creatorcontrib>Hopkins, John D</creatorcontrib><creatorcontrib>Gupta, Sidhartha</creatorcontrib><title>Memory Circuitry And Method Used In Forming Memory Circuitry</title><description>A method used in forming memory circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers directly above a conductor tier. The first tiers comprise sacrificial material and the second tiers comprise non-sacrificial material that is of different composition from that of the sacrificial material. The stack comprises horizontally-elongated trenches extending through the first tiers and the second tiers and are individually between immediately-laterally-adjacent memory-block regions. Channel-material strings are formed that extend through the first and second tiers in the memory-block regions. Through the horizontally-elongated trenches, the sacrificial material is replaced with conductive material that comprises control-gate lines in the memory-block regions. After the replacing, conducting material is formed in a lowest of the first tiers and directly electrically couples together the channel material of the channel-material strings and conductor material of the conductor tier. Other embodiments, including structure, are disclosed.</description><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLDxTc3NL6pUcM4sSi7NLAGyHPNSFHxTSzLyUxRCi1NTFDzzFNzyi3Iz89IV0NXyMLCmJeYUp_JCaW4GZTfXEGcP3dSC_PjU4oLE5NS81JL40GAjAyMTIwMzQ3NTR0Nj4lQBAE9kMA0</recordid><startdate>20240620</startdate><enddate>20240620</enddate><creator>Saxler, Adam W</creator><creator>Li, Andrew</creator><creator>Hopkins, John D</creator><creator>Gupta, Sidhartha</creator><scope>EVB</scope></search><sort><creationdate>20240620</creationdate><title>Memory Circuitry And Method Used In Forming Memory Circuitry</title><author>Saxler, Adam W ; Li, Andrew ; Hopkins, John D ; Gupta, Sidhartha</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024206175A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>Saxler, Adam W</creatorcontrib><creatorcontrib>Li, Andrew</creatorcontrib><creatorcontrib>Hopkins, John D</creatorcontrib><creatorcontrib>Gupta, Sidhartha</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Saxler, Adam W</au><au>Li, Andrew</au><au>Hopkins, John D</au><au>Gupta, Sidhartha</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Memory Circuitry And Method Used In Forming Memory Circuitry</title><date>2024-06-20</date><risdate>2024</risdate><abstract>A method used in forming memory circuitry comprises forming a stack comprising vertically-alternating first tiers and second tiers directly above a conductor tier. The first tiers comprise sacrificial material and the second tiers comprise non-sacrificial material that is of different composition from that of the sacrificial material. The stack comprises horizontally-elongated trenches extending through the first tiers and the second tiers and are individually between immediately-laterally-adjacent memory-block regions. Channel-material strings are formed that extend through the first and second tiers in the memory-block regions. Through the horizontally-elongated trenches, the sacrificial material is replaced with conductive material that comprises control-gate lines in the memory-block regions. After the replacing, conducting material is formed in a lowest of the first tiers and directly electrically couples together the channel material of the channel-material strings and conductor material of the conductor tier. Other embodiments, including structure, are disclosed.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2024206175A1
source esp@cenet
subjects ELECTRICITY
title Memory Circuitry And Method Used In Forming Memory Circuitry
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-06T08%3A26%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Saxler,%20Adam%20W&rft.date=2024-06-20&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024206175A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true