POWER AMPLIFIER
A power amplifier includes a first transistor and a bias circuit, in which the bias circuit includes a first bias detection circuit, an error amplifier circuit, a bias output buffer circuit, and a second bias detection circuit, the error amplifier circuit includes a comparator, the bias output buffe...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | NASU, Koji |
| description | A power amplifier includes a first transistor and a bias circuit, in which the bias circuit includes a first bias detection circuit, an error amplifier circuit, a bias output buffer circuit, and a second bias detection circuit, the error amplifier circuit includes a comparator, the bias output buffer circuit includes a second transistor, a first node, and a second node, the first bias detection circuit is connected between a drain of the first transistor and the comparator, the second transistor is connected between the comparator and the first node, the first node is connected between the second transistor and the second node and between the transistor and the second bias detection circuit, the second node is connected between the first node and a gate of the first transistor, and the second bias detection circuit is connected between the first node and the second node. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024204736A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024204736A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024204736A13</originalsourceid><addsrcrecordid>eNrjZOAP8A93DVJw9A3w8XTzdA3iYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBkYmRgYm5sZmjobGxKkCAF2oHiw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>POWER AMPLIFIER</title><source>esp@cenet</source><creator>NASU, Koji</creator><creatorcontrib>NASU, Koji</creatorcontrib><description>A power amplifier includes a first transistor and a bias circuit, in which the bias circuit includes a first bias detection circuit, an error amplifier circuit, a bias output buffer circuit, and a second bias detection circuit, the error amplifier circuit includes a comparator, the bias output buffer circuit includes a second transistor, a first node, and a second node, the first bias detection circuit is connected between a drain of the first transistor and the comparator, the second transistor is connected between the comparator and the first node, the first node is connected between the second transistor and the second node and between the transistor and the second bias detection circuit, the second node is connected between the first node and a gate of the first transistor, and the second bias detection circuit is connected between the first node and the second node.</description><language>eng</language><subject>AMPLIFIERS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240620&DB=EPODOC&CC=US&NR=2024204736A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240620&DB=EPODOC&CC=US&NR=2024204736A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>NASU, Koji</creatorcontrib><title>POWER AMPLIFIER</title><description>A power amplifier includes a first transistor and a bias circuit, in which the bias circuit includes a first bias detection circuit, an error amplifier circuit, a bias output buffer circuit, and a second bias detection circuit, the error amplifier circuit includes a comparator, the bias output buffer circuit includes a second transistor, a first node, and a second node, the first bias detection circuit is connected between a drain of the first transistor and the comparator, the second transistor is connected between the comparator and the first node, the first node is connected between the second transistor and the second node and between the transistor and the second bias detection circuit, the second node is connected between the first node and a gate of the first transistor, and the second bias detection circuit is connected between the first node and the second node.</description><subject>AMPLIFIERS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZOAP8A93DVJw9A3w8XTzdA3iYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBkYmRgYm5sZmjobGxKkCAF2oHiw</recordid><startdate>20240620</startdate><enddate>20240620</enddate><creator>NASU, Koji</creator><scope>EVB</scope></search><sort><creationdate>20240620</creationdate><title>POWER AMPLIFIER</title><author>NASU, Koji</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024204736A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>AMPLIFIERS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>NASU, Koji</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>NASU, Koji</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>POWER AMPLIFIER</title><date>2024-06-20</date><risdate>2024</risdate><abstract>A power amplifier includes a first transistor and a bias circuit, in which the bias circuit includes a first bias detection circuit, an error amplifier circuit, a bias output buffer circuit, and a second bias detection circuit, the error amplifier circuit includes a comparator, the bias output buffer circuit includes a second transistor, a first node, and a second node, the first bias detection circuit is connected between a drain of the first transistor and the comparator, the second transistor is connected between the comparator and the first node, the first node is connected between the second transistor and the second node and between the transistor and the second bias detection circuit, the second node is connected between the first node and a gate of the first transistor, and the second bias detection circuit is connected between the first node and the second node.</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_US2024204736A1 |
| source | esp@cenet |
| subjects | AMPLIFIERS BASIC ELECTRONIC CIRCUITRY ELECTRICITY |
| title | POWER AMPLIFIER |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-03T07%3A20%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=NASU,%20Koji&rft.date=2024-06-20&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024204736A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |