SEMICONDUCTOR DEVICE

A semiconductor device includes a gate electrode structure including first to fourth gate electrodes, a first memory channel structure extending through the first to third gate electrodes, a second memory channel structure contacting an upper surface of the first memory channel structure and extendi...

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Hauptverfasser: Choi, Chulmin, Shim, Sunil, Lim, Joohyun
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creator Choi, Chulmin
Shim, Sunil
Lim, Joohyun
description A semiconductor device includes a gate electrode structure including first to fourth gate electrodes, a first memory channel structure extending through the first to third gate electrodes, a second memory channel structure contacting an upper surface of the first memory channel structure and extending through the fourth gate electrode, and a first contact plug including a lower portion extending partially through the gate electrode structure and an upper portion on and contacting an upper surface of the lower portion. The lower portion of the first contact plug has a varying width, and the upper portion of the first contact plug has a width gradually increasing from a bottom toward a top thereof. The lower portion of the first contact plug extends through the first, second and third gate electrodes, and is electrically insulated from the first and second gate electrodes, and is electrically connected to the third gate electrode.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024179914A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024179914A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024179914A13</originalsourceid><addsrcrecordid>eNrjZBAJdvX1dPb3cwl1DvEPUnBxDfN0duVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRiaG5paWhiaOhsbEqQIA_mIfrA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SEMICONDUCTOR DEVICE</title><source>esp@cenet</source><creator>Choi, Chulmin ; Shim, Sunil ; Lim, Joohyun</creator><creatorcontrib>Choi, Chulmin ; Shim, Sunil ; Lim, Joohyun</creatorcontrib><description>A semiconductor device includes a gate electrode structure including first to fourth gate electrodes, a first memory channel structure extending through the first to third gate electrodes, a second memory channel structure contacting an upper surface of the first memory channel structure and extending through the fourth gate electrode, and a first contact plug including a lower portion extending partially through the gate electrode structure and an upper portion on and contacting an upper surface of the lower portion. The lower portion of the first contact plug has a varying width, and the upper portion of the first contact plug has a width gradually increasing from a bottom toward a top thereof. The lower portion of the first contact plug extends through the first, second and third gate electrodes, and is electrically insulated from the first and second gate electrodes, and is electrically connected to the third gate electrode.</description><language>eng</language><subject>ELECTRICITY</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240530&amp;DB=EPODOC&amp;CC=US&amp;NR=2024179914A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240530&amp;DB=EPODOC&amp;CC=US&amp;NR=2024179914A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Choi, Chulmin</creatorcontrib><creatorcontrib>Shim, Sunil</creatorcontrib><creatorcontrib>Lim, Joohyun</creatorcontrib><title>SEMICONDUCTOR DEVICE</title><description>A semiconductor device includes a gate electrode structure including first to fourth gate electrodes, a first memory channel structure extending through the first to third gate electrodes, a second memory channel structure contacting an upper surface of the first memory channel structure and extending through the fourth gate electrode, and a first contact plug including a lower portion extending partially through the gate electrode structure and an upper portion on and contacting an upper surface of the lower portion. The lower portion of the first contact plug has a varying width, and the upper portion of the first contact plug has a width gradually increasing from a bottom toward a top thereof. The lower portion of the first contact plug extends through the first, second and third gate electrodes, and is electrically insulated from the first and second gate electrodes, and is electrically connected to the third gate electrode.</description><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAJdvX1dPb3cwl1DvEPUnBxDfN0duVhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRiaG5paWhiaOhsbEqQIA_mIfrA</recordid><startdate>20240530</startdate><enddate>20240530</enddate><creator>Choi, Chulmin</creator><creator>Shim, Sunil</creator><creator>Lim, Joohyun</creator><scope>EVB</scope></search><sort><creationdate>20240530</creationdate><title>SEMICONDUCTOR DEVICE</title><author>Choi, Chulmin ; Shim, Sunil ; Lim, Joohyun</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024179914A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>Choi, Chulmin</creatorcontrib><creatorcontrib>Shim, Sunil</creatorcontrib><creatorcontrib>Lim, Joohyun</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Choi, Chulmin</au><au>Shim, Sunil</au><au>Lim, Joohyun</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SEMICONDUCTOR DEVICE</title><date>2024-05-30</date><risdate>2024</risdate><abstract>A semiconductor device includes a gate electrode structure including first to fourth gate electrodes, a first memory channel structure extending through the first to third gate electrodes, a second memory channel structure contacting an upper surface of the first memory channel structure and extending through the fourth gate electrode, and a first contact plug including a lower portion extending partially through the gate electrode structure and an upper portion on and contacting an upper surface of the lower portion. The lower portion of the first contact plug has a varying width, and the upper portion of the first contact plug has a width gradually increasing from a bottom toward a top thereof. The lower portion of the first contact plug extends through the first, second and third gate electrodes, and is electrically insulated from the first and second gate electrodes, and is electrically connected to the third gate electrode.</abstract><oa>free_for_read</oa></addata></record>
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title SEMICONDUCTOR DEVICE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-07T23%3A27%3A52IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Choi,%20Chulmin&rft.date=2024-05-30&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024179914A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true