MULTILAYER STACKING WAFER BONDING STRUCTURE AND METHOD OF MANUFACTURING THE SAME

A multilayer stacking wafer bonding structure is provided in the present invention, including a logic wafer with a substrate and a logic circuit layer on the substrate, multiple memory wafers bonded sequentially on the logic circuit layer to form a first multilayer stacking structure, wherein each m...

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Bibliographische Detailangaben

Hauptverfasser:	Lu, Chun-Lin, Chang, Shou-Zen
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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