RECONFIGURABLE PARALLEL PROCESSOR WITH STACKED COLUMNS FORMING A CIRCULAR DATA PATH
Processors, systems and methods are provided for thread level parallel processing. A processor may include a plurality of columns of vector processing units arranged in a two-dimensional column array with a plurality of column stacks placed side-by-side in a first direction and each column stack hav...
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| creator | LI, Yuan Braidwood, Ryan Nagata, Toshio Zhu, Jianbin |
| description | Processors, systems and methods are provided for thread level parallel processing. A processor may include a plurality of columns of vector processing units arranged in a two-dimensional column array with a plurality of column stacks placed side-by-side in a first direction and each column stack having two columns stacked in a second direction and a temporary storage buffer. Each column may include a processing element (PE) that has a vector Arithmetic Logic Unit (ALU) to perform arithmetic operations in parallel threads. At a first end of the column array in the first direction, two columns in the column stack are coupled to the temporary storage buffer for one-way data flow. At a second end of the column array in the first direction, two columns are coupled to each other for one-way data flow. The column array and the temporary storage buffer may form a one-way circular data path. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024160602A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024160602A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024160602A13</originalsourceid><addsrcrecordid>eNqNy7EKwjAQgOEsDqK-w4GzkEbpfl6TNpgm5ZLgWIrESbRQ3x8dfACnf_n-tYisKXhj28x4dhoGZHROOxg4kI4xMFxt6iAmpItugILLvY9gAvfWt4BAlik7ZGgw4fdP3Vas7tNjKbtfN2JvdKLuUObXWJZ5upVneY85KqlOVS1rqbA6_qc-zGMwvA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>RECONFIGURABLE PARALLEL PROCESSOR WITH STACKED COLUMNS FORMING A CIRCULAR DATA PATH</title><source>esp@cenet</source><creator>LI, Yuan ; Braidwood, Ryan ; Nagata, Toshio ; Zhu, Jianbin</creator><creatorcontrib>LI, Yuan ; Braidwood, Ryan ; Nagata, Toshio ; Zhu, Jianbin</creatorcontrib><description>Processors, systems and methods are provided for thread level parallel processing. A processor may include a plurality of columns of vector processing units arranged in a two-dimensional column array with a plurality of column stacks placed side-by-side in a first direction and each column stack having two columns stacked in a second direction and a temporary storage buffer. Each column may include a processing element (PE) that has a vector Arithmetic Logic Unit (ALU) to perform arithmetic operations in parallel threads. At a first end of the column array in the first direction, two columns in the column stack are coupled to the temporary storage buffer for one-way data flow. At a second end of the column array in the first direction, two columns are coupled to each other for one-way data flow. The column array and the temporary storage buffer may form a one-way circular data path.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240516&DB=EPODOC&CC=US&NR=2024160602A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240516&DB=EPODOC&CC=US&NR=2024160602A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LI, Yuan</creatorcontrib><creatorcontrib>Braidwood, Ryan</creatorcontrib><creatorcontrib>Nagata, Toshio</creatorcontrib><creatorcontrib>Zhu, Jianbin</creatorcontrib><title>RECONFIGURABLE PARALLEL PROCESSOR WITH STACKED COLUMNS FORMING A CIRCULAR DATA PATH</title><description>Processors, systems and methods are provided for thread level parallel processing. A processor may include a plurality of columns of vector processing units arranged in a two-dimensional column array with a plurality of column stacks placed side-by-side in a first direction and each column stack having two columns stacked in a second direction and a temporary storage buffer. Each column may include a processing element (PE) that has a vector Arithmetic Logic Unit (ALU) to perform arithmetic operations in parallel threads. At a first end of the column array in the first direction, two columns in the column stack are coupled to the temporary storage buffer for one-way data flow. At a second end of the column array in the first direction, two columns are coupled to each other for one-way data flow. The column array and the temporary storage buffer may form a one-way circular data path.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNy7EKwjAQgOEsDqK-w4GzkEbpfl6TNpgm5ZLgWIrESbRQ3x8dfACnf_n-tYisKXhj28x4dhoGZHROOxg4kI4xMFxt6iAmpItugILLvY9gAvfWt4BAlik7ZGgw4fdP3Vas7tNjKbtfN2JvdKLuUObXWJZ5upVneY85KqlOVS1rqbA6_qc-zGMwvA</recordid><startdate>20240516</startdate><enddate>20240516</enddate><creator>LI, Yuan</creator><creator>Braidwood, Ryan</creator><creator>Nagata, Toshio</creator><creator>Zhu, Jianbin</creator><scope>EVB</scope></search><sort><creationdate>20240516</creationdate><title>RECONFIGURABLE PARALLEL PROCESSOR WITH STACKED COLUMNS FORMING A CIRCULAR DATA PATH</title><author>LI, Yuan ; Braidwood, Ryan ; Nagata, Toshio ; Zhu, Jianbin</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024160602A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>LI, Yuan</creatorcontrib><creatorcontrib>Braidwood, Ryan</creatorcontrib><creatorcontrib>Nagata, Toshio</creatorcontrib><creatorcontrib>Zhu, Jianbin</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LI, Yuan</au><au>Braidwood, Ryan</au><au>Nagata, Toshio</au><au>Zhu, Jianbin</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>RECONFIGURABLE PARALLEL PROCESSOR WITH STACKED COLUMNS FORMING A CIRCULAR DATA PATH</title><date>2024-05-16</date><risdate>2024</risdate><abstract>Processors, systems and methods are provided for thread level parallel processing. A processor may include a plurality of columns of vector processing units arranged in a two-dimensional column array with a plurality of column stacks placed side-by-side in a first direction and each column stack having two columns stacked in a second direction and a temporary storage buffer. Each column may include a processing element (PE) that has a vector Arithmetic Logic Unit (ALU) to perform arithmetic operations in parallel threads. At a first end of the column array in the first direction, two columns in the column stack are coupled to the temporary storage buffer for one-way data flow. At a second end of the column array in the first direction, two columns are coupled to each other for one-way data flow. The column array and the temporary storage buffer may form a one-way circular data path.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | RECONFIGURABLE PARALLEL PROCESSOR WITH STACKED COLUMNS FORMING A CIRCULAR DATA PATH |
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