SHALLOW TRENCH TEXTURED REGIONS AND ASSOCIATED METHODS
Photosensitive devices and associated methods are provided. In one aspect, for example, a photosensitive imager device can include a semiconductor layer having multiple doped regions forming a least one junction, a textured region coupled to the semiconductor layer and positioned to interact with el...
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creator | Jiang, Jutao Haddad, Homayoon |
description | Photosensitive devices and associated methods are provided. In one aspect, for example, a photosensitive imager device can include a semiconductor layer having multiple doped regions forming a least one junction, a textured region coupled to the semiconductor layer and positioned to interact with electromagnetic radiation. The textured region can be formed from a series of shallow trench isolation features. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024153984A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024153984A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024153984A13</originalsourceid><addsrcrecordid>eNrjZDAL9nD08fEPVwgJcvVz9lAIcY0ICQ1ydVEIcnX39PcLVnD0c1FwDA72d_Z0DAEK-7qGePi7BPMwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDIxNDU2NLCxNHQ2PiVAEAykYpDg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SHALLOW TRENCH TEXTURED REGIONS AND ASSOCIATED METHODS</title><source>esp@cenet</source><creator>Jiang, Jutao ; Haddad, Homayoon</creator><creatorcontrib>Jiang, Jutao ; Haddad, Homayoon</creatorcontrib><description>Photosensitive devices and associated methods are provided. In one aspect, for example, a photosensitive imager device can include a semiconductor layer having multiple doped regions forming a least one junction, a textured region coupled to the semiconductor layer and positioned to interact with electromagnetic radiation. The textured region can be formed from a series of shallow trench isolation features.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CLADDING OR PLATING BY SOLDERING OR WELDING ; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MACHINE TOOLS ; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES ; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES ; METAL-WORKING NOT OTHERWISE PROVIDED FOR ; NANOTECHNOLOGY ; PERFORMING OPERATIONS ; SEMICONDUCTOR DEVICES ; SOLDERING OR UNSOLDERING ; SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES ; TRANSPORTING ; WELDING ; WORKING BY LASER BEAM</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240509&DB=EPODOC&CC=US&NR=2024153984A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240509&DB=EPODOC&CC=US&NR=2024153984A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Jiang, Jutao</creatorcontrib><creatorcontrib>Haddad, Homayoon</creatorcontrib><title>SHALLOW TRENCH TEXTURED REGIONS AND ASSOCIATED METHODS</title><description>Photosensitive devices and associated methods are provided. In one aspect, for example, a photosensitive imager device can include a semiconductor layer having multiple doped regions forming a least one junction, a textured region coupled to the semiconductor layer and positioned to interact with electromagnetic radiation. The textured region can be formed from a series of shallow trench isolation features.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CLADDING OR PLATING BY SOLDERING OR WELDING</subject><subject>CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MACHINE TOOLS</subject><subject>MANUFACTURE OR TREATMENT OF NANOSTRUCTURES</subject><subject>MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES</subject><subject>METAL-WORKING NOT OTHERWISE PROVIDED FOR</subject><subject>NANOTECHNOLOGY</subject><subject>PERFORMING OPERATIONS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>SOLDERING OR UNSOLDERING</subject><subject>SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES</subject><subject>TRANSPORTING</subject><subject>WELDING</subject><subject>WORKING BY LASER BEAM</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAL9nD08fEPVwgJcvVz9lAIcY0ICQ1ydVEIcnX39PcLVnD0c1FwDA72d_Z0DAEK-7qGePi7BPMwsKYl5hSn8kJpbgZlN9cQZw_d1IL8-NTigsTk1LzUkvjQYCMDIxNDU2NLCxNHQ2PiVAEAykYpDg</recordid><startdate>20240509</startdate><enddate>20240509</enddate><creator>Jiang, Jutao</creator><creator>Haddad, Homayoon</creator><scope>EVB</scope></search><sort><creationdate>20240509</creationdate><title>SHALLOW TRENCH TEXTURED REGIONS AND ASSOCIATED METHODS</title><author>Jiang, Jutao ; Haddad, Homayoon</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024153984A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CLADDING OR PLATING BY SOLDERING OR WELDING</topic><topic>CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MACHINE TOOLS</topic><topic>MANUFACTURE OR TREATMENT OF NANOSTRUCTURES</topic><topic>MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES</topic><topic>METAL-WORKING NOT OTHERWISE PROVIDED FOR</topic><topic>NANOTECHNOLOGY</topic><topic>PERFORMING OPERATIONS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>SOLDERING OR UNSOLDERING</topic><topic>SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES</topic><topic>TRANSPORTING</topic><topic>WELDING</topic><topic>WORKING BY LASER BEAM</topic><toplevel>online_resources</toplevel><creatorcontrib>Jiang, Jutao</creatorcontrib><creatorcontrib>Haddad, Homayoon</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Jiang, Jutao</au><au>Haddad, Homayoon</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SHALLOW TRENCH TEXTURED REGIONS AND ASSOCIATED METHODS</title><date>2024-05-09</date><risdate>2024</risdate><abstract>Photosensitive devices and associated methods are provided. In one aspect, for example, a photosensitive imager device can include a semiconductor layer having multiple doped regions forming a least one junction, a textured region coupled to the semiconductor layer and positioned to interact with electromagnetic radiation. The textured region can be formed from a series of shallow trench isolation features.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS CLADDING OR PLATING BY SOLDERING OR WELDING CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MACHINE TOOLS MANUFACTURE OR TREATMENT OF NANOSTRUCTURES MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES METAL-WORKING NOT OTHERWISE PROVIDED FOR NANOTECHNOLOGY PERFORMING OPERATIONS SEMICONDUCTOR DEVICES SOLDERING OR UNSOLDERING SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES TRANSPORTING WELDING WORKING BY LASER BEAM |
title | SHALLOW TRENCH TEXTURED REGIONS AND ASSOCIATED METHODS |
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