SYSTEM SETTING INCLUDING OPERATING FREQUENCY OF RANDOM ACCESS MEMORY BASED ON CACHE HIT RATIO AND OPERATING METHOD THEREOF
Embodiments of the present disclosure relate to a system and an operating method of the system. Based on some embodiments of the disclosed technology, the system may include a random access memory structured to include memory cells to store data, a cache memory configured to cache at least part of t...
Gespeichert in:
Hauptverfasser: | , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | CHOI, Kwang Ho HWANG, Yong Wan JEONG, Nam Hyeok HA, Tae Woong CHOI, Moon Hyeok |
description | Embodiments of the present disclosure relate to a system and an operating method of the system. Based on some embodiments of the disclosed technology, the system may include a random access memory structured to include memory cells to store data, a cache memory configured to cache at least part of the data, and a processor in communication with the random access memory and the cache memory to access at least part of the data from the random access memory or cache memory. The system may determine a cache hit ratio for the cache memory, and may set an operating frequency of the random access memory based on the cache hit ratio. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024152456A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024152456A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024152456A13</originalsourceid><addsrcrecordid>eNqNjLEKwjAURbs4iPoPD5wFW1v3mLyYgsnTvGToVIrESbRQJ79eKw6OTvdwOfdOsyc3HNACYwi120Pt5CGqkeiIXnw67fEU0ckGSIMXTpEFISUyg0VLvoGdYFRADqSQBsHUAcYtwVv-ObIYDCkIBj2SnmeTS3cd0uKbs2ypMUizSv29TUPfndMtPdrIxboo86ooq63IN_9ZL_WgO00</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SYSTEM SETTING INCLUDING OPERATING FREQUENCY OF RANDOM ACCESS MEMORY BASED ON CACHE HIT RATIO AND OPERATING METHOD THEREOF</title><source>esp@cenet</source><creator>CHOI, Kwang Ho ; HWANG, Yong Wan ; JEONG, Nam Hyeok ; HA, Tae Woong ; CHOI, Moon Hyeok</creator><creatorcontrib>CHOI, Kwang Ho ; HWANG, Yong Wan ; JEONG, Nam Hyeok ; HA, Tae Woong ; CHOI, Moon Hyeok</creatorcontrib><description>Embodiments of the present disclosure relate to a system and an operating method of the system. Based on some embodiments of the disclosed technology, the system may include a random access memory structured to include memory cells to store data, a cache memory configured to cache at least part of the data, and a processor in communication with the random access memory and the cache memory to access at least part of the data from the random access memory or cache memory. The system may determine a cache hit ratio for the cache memory, and may set an operating frequency of the random access memory based on the cache hit ratio.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240509&DB=EPODOC&CC=US&NR=2024152456A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240509&DB=EPODOC&CC=US&NR=2024152456A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHOI, Kwang Ho</creatorcontrib><creatorcontrib>HWANG, Yong Wan</creatorcontrib><creatorcontrib>JEONG, Nam Hyeok</creatorcontrib><creatorcontrib>HA, Tae Woong</creatorcontrib><creatorcontrib>CHOI, Moon Hyeok</creatorcontrib><title>SYSTEM SETTING INCLUDING OPERATING FREQUENCY OF RANDOM ACCESS MEMORY BASED ON CACHE HIT RATIO AND OPERATING METHOD THEREOF</title><description>Embodiments of the present disclosure relate to a system and an operating method of the system. Based on some embodiments of the disclosed technology, the system may include a random access memory structured to include memory cells to store data, a cache memory configured to cache at least part of the data, and a processor in communication with the random access memory and the cache memory to access at least part of the data from the random access memory or cache memory. The system may determine a cache hit ratio for the cache memory, and may set an operating frequency of the random access memory based on the cache hit ratio.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjLEKwjAURbs4iPoPD5wFW1v3mLyYgsnTvGToVIrESbRQJ79eKw6OTvdwOfdOsyc3HNACYwi120Pt5CGqkeiIXnw67fEU0ckGSIMXTpEFISUyg0VLvoGdYFRADqSQBsHUAcYtwVv-ObIYDCkIBj2SnmeTS3cd0uKbs2ypMUizSv29TUPfndMtPdrIxboo86ooq63IN_9ZL_WgO00</recordid><startdate>20240509</startdate><enddate>20240509</enddate><creator>CHOI, Kwang Ho</creator><creator>HWANG, Yong Wan</creator><creator>JEONG, Nam Hyeok</creator><creator>HA, Tae Woong</creator><creator>CHOI, Moon Hyeok</creator><scope>EVB</scope></search><sort><creationdate>20240509</creationdate><title>SYSTEM SETTING INCLUDING OPERATING FREQUENCY OF RANDOM ACCESS MEMORY BASED ON CACHE HIT RATIO AND OPERATING METHOD THEREOF</title><author>CHOI, Kwang Ho ; HWANG, Yong Wan ; JEONG, Nam Hyeok ; HA, Tae Woong ; CHOI, Moon Hyeok</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024152456A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>CHOI, Kwang Ho</creatorcontrib><creatorcontrib>HWANG, Yong Wan</creatorcontrib><creatorcontrib>JEONG, Nam Hyeok</creatorcontrib><creatorcontrib>HA, Tae Woong</creatorcontrib><creatorcontrib>CHOI, Moon Hyeok</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHOI, Kwang Ho</au><au>HWANG, Yong Wan</au><au>JEONG, Nam Hyeok</au><au>HA, Tae Woong</au><au>CHOI, Moon Hyeok</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SYSTEM SETTING INCLUDING OPERATING FREQUENCY OF RANDOM ACCESS MEMORY BASED ON CACHE HIT RATIO AND OPERATING METHOD THEREOF</title><date>2024-05-09</date><risdate>2024</risdate><abstract>Embodiments of the present disclosure relate to a system and an operating method of the system. Based on some embodiments of the disclosed technology, the system may include a random access memory structured to include memory cells to store data, a cache memory configured to cache at least part of the data, and a processor in communication with the random access memory and the cache memory to access at least part of the data from the random access memory or cache memory. The system may determine a cache hit ratio for the cache memory, and may set an operating frequency of the random access memory based on the cache hit ratio.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2024152456A1 |
source | esp@cenet |
subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | SYSTEM SETTING INCLUDING OPERATING FREQUENCY OF RANDOM ACCESS MEMORY BASED ON CACHE HIT RATIO AND OPERATING METHOD THEREOF |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-01T16%3A46%3A51IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHOI,%20Kwang%20Ho&rft.date=2024-05-09&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024152456A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |