3D PRINTED SEMICONDUCTOR PACKAGE

In described examples, an integrated circuit comprises: a substrate; a semiconductor die on the substrate; and a device on the substrate and electrically coupled to the semiconductor die, the device including a polymer structure coated with a metal.

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Hauptverfasser: Revier, Daniel Lee, Cook, Benjamin Stassen
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creator Revier, Daniel Lee
Cook, Benjamin Stassen
description In described examples, an integrated circuit comprises: a substrate; a semiconductor die on the substrate; and a device on the substrate and electrically coupled to the semiconductor die, the device including a polymer structure coated with a metal.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024145526A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024145526A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024145526A13</originalsourceid><addsrcrecordid>eNrjZFAwdlEICPL0C3F1UQh29fV09vdzCXUO8Q9SCHB09nZ0d-VhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRiaGJqamRmaOhsbEqQIAbLQisQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>3D PRINTED SEMICONDUCTOR PACKAGE</title><source>esp@cenet</source><creator>Revier, Daniel Lee ; Cook, Benjamin Stassen</creator><creatorcontrib>Revier, Daniel Lee ; Cook, Benjamin Stassen</creatorcontrib><description>In described examples, an integrated circuit comprises: a substrate; a semiconductor die on the substrate; and a device on the substrate and electrically coupled to the semiconductor die, the device including a polymer structure coated with a metal.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INDUCTANCES ; MAGNETS ; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES ; SEMICONDUCTOR DEVICES ; TRANSFORMERS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240502&amp;DB=EPODOC&amp;CC=US&amp;NR=2024145526A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240502&amp;DB=EPODOC&amp;CC=US&amp;NR=2024145526A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Revier, Daniel Lee</creatorcontrib><creatorcontrib>Cook, Benjamin Stassen</creatorcontrib><title>3D PRINTED SEMICONDUCTOR PACKAGE</title><description>In described examples, an integrated circuit comprises: a substrate; a semiconductor die on the substrate; and a device on the substrate and electrically coupled to the semiconductor die, the device including a polymer structure coated with a metal.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>INDUCTANCES</subject><subject>MAGNETS</subject><subject>SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TRANSFORMERS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAwdlEICPL0C3F1UQh29fV09vdzCXUO8Q9SCHB09nZ0d-VhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRiaGJqamRmaOhsbEqQIAbLQisQ</recordid><startdate>20240502</startdate><enddate>20240502</enddate><creator>Revier, Daniel Lee</creator><creator>Cook, Benjamin Stassen</creator><scope>EVB</scope></search><sort><creationdate>20240502</creationdate><title>3D PRINTED SEMICONDUCTOR PACKAGE</title><author>Revier, Daniel Lee ; Cook, Benjamin Stassen</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024145526A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>INDUCTANCES</topic><topic>MAGNETS</topic><topic>SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TRANSFORMERS</topic><toplevel>online_resources</toplevel><creatorcontrib>Revier, Daniel Lee</creatorcontrib><creatorcontrib>Cook, Benjamin Stassen</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Revier, Daniel Lee</au><au>Cook, Benjamin Stassen</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>3D PRINTED SEMICONDUCTOR PACKAGE</title><date>2024-05-02</date><risdate>2024</risdate><abstract>In described examples, an integrated circuit comprises: a substrate; a semiconductor die on the substrate; and a device on the substrate and electrically coupled to the semiconductor die, the device including a polymer structure coated with a metal.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
INDUCTANCES
MAGNETS
SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
SEMICONDUCTOR DEVICES
TRANSFORMERS
title 3D PRINTED SEMICONDUCTOR PACKAGE
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-12T10%3A50%3A04IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Revier,%20Daniel%20Lee&rft.date=2024-05-02&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024145526A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true