INTEGRATED CIRCUIT CHIP INCLUDING A PASSIVATION NITRIDE LAYER IN CONTACT WITH A HIGH VOLTAGE BONDING PAD AND METHOD OF MAKING

INTEGRATED CIRCUIT CHIP INCLUDING A PASSIVATION NITRIDE LAYER IN CONTACT WITH A HIGH VOLTAGE BONDING PAD AND METHOD OF MAKING

A back end of line (BEOL) structure for an integrated circuit chip includes a last metal structure providing a bonding pad. A passivation structure over the bonding pad includes a first opening extending exposing an upper surface of the bonding pad. A conformal nitride layer extends over the passiva...

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Hauptverfasser: MARIANI, Simone Dario, DORIA, Daria, PIZZI, Elisabetta
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator MARIANI, Simone Dario
DORIA, Daria
PIZZI, Elisabetta
description A back end of line (BEOL) structure for an integrated circuit chip includes a last metal structure providing a bonding pad. A passivation structure over the bonding pad includes a first opening extending exposing an upper surface of the bonding pad. A conformal nitride layer extends over the passivation structure and is placed in contact with the upper surface of the bonding pad. An insulator material layer covers the conformal nitride layer and includes a second opening that extends through both the insulator material layer and the conformal nitride layer. A foot portion of the conformal nitride layer on the upper surface of the bonding pad is self-aligned with the second opening.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title INTEGRATED CIRCUIT CHIP INCLUDING A PASSIVATION NITRIDE LAYER IN CONTACT WITH A HIGH VOLTAGE BONDING PAD AND METHOD OF MAKING
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