EFFICIENT L2P DRAM FOR HIGH-CAPACITY DRIVES
The present disclosure generally relates to improving space efficiency when storing logical to physical (L2P) entries. Rather than writing a physical block address (PBA) spanning multiple entries, the PBA is split between a first portion stored in the buffer with the remaining bits of the PBA added...
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creator | BENISTY, Shay |
description | The present disclosure generally relates to improving space efficiency when storing logical to physical (L2P) entries. Rather than writing a physical block address (PBA) spanning multiple entries, the PBA is split between a first portion stored in the buffer with the remaining bits of the PBA added to the metadata buffer. The metadata buffer is sub-optimal due to the small size of the metadata relative to the entry and therefore, adding extra bits to the metadata buffer will make the metadata buffer more optimal. In this scheme, the alignment is preserved, the system becomes more optimal in terms of DRAM access, and the metadata buffer can be easily optimized and adapted. |
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Rather than writing a physical block address (PBA) spanning multiple entries, the PBA is split between a first portion stored in the buffer with the remaining bits of the PBA added to the metadata buffer. The metadata buffer is sub-optimal due to the small size of the metadata relative to the entry and therefore, adding extra bits to the metadata buffer will make the metadata buffer more optimal. In this scheme, the alignment is preserved, the system becomes more optimal in terms of DRAM access, and the metadata buffer can be easily optimized and adapted.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240321&DB=EPODOC&CC=US&NR=2024095165A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25544,76295</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240321&DB=EPODOC&CC=US&NR=2024095165A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BENISTY, Shay</creatorcontrib><title>EFFICIENT L2P DRAM FOR HIGH-CAPACITY DRIVES</title><description>The present disclosure generally relates to improving space efficiency when storing logical to physical (L2P) entries. Rather than writing a physical block address (PBA) spanning multiple entries, the PBA is split between a first portion stored in the buffer with the remaining bits of the PBA added to the metadata buffer. The metadata buffer is sub-optimal due to the small size of the metadata relative to the entry and therefore, adding extra bits to the metadata buffer will make the metadata buffer more optimal. In this scheme, the alignment is preserved, the system becomes more optimal in terms of DRAM access, and the metadata buffer can be easily optimized and adapted.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNB2dXPzdPZ09QtR8DEKUHAJcvRVcPMPUvDwdPfQdXYMcHT2DIkECnuGuQbzMLCmJeYUp_JCaW4GZTfXEGcP3dSC_PjU4oLE5NS81JL40GAjAyMTA0tTQzNTR0Nj4lQBANfUJXg</recordid><startdate>20240321</startdate><enddate>20240321</enddate><creator>BENISTY, Shay</creator><scope>EVB</scope></search><sort><creationdate>20240321</creationdate><title>EFFICIENT L2P DRAM FOR HIGH-CAPACITY DRIVES</title><author>BENISTY, Shay</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024095165A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>BENISTY, Shay</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BENISTY, Shay</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>EFFICIENT L2P DRAM FOR HIGH-CAPACITY DRIVES</title><date>2024-03-21</date><risdate>2024</risdate><abstract>The present disclosure generally relates to improving space efficiency when storing logical to physical (L2P) entries. Rather than writing a physical block address (PBA) spanning multiple entries, the PBA is split between a first portion stored in the buffer with the remaining bits of the PBA added to the metadata buffer. The metadata buffer is sub-optimal due to the small size of the metadata relative to the entry and therefore, adding extra bits to the metadata buffer will make the metadata buffer more optimal. In this scheme, the alignment is preserved, the system becomes more optimal in terms of DRAM access, and the metadata buffer can be easily optimized and adapted.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | EFFICIENT L2P DRAM FOR HIGH-CAPACITY DRIVES |
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