VERTICAL TRANSISTOR AND MANUFACTURING METHOD THEREOF

Provided are a vertical transistor and a method of manufacturing the same. The vertical transistor includes a substrate, a lower electrode on the substrate and including a metal material, a carbon thin film being conductive and on the lower electrode, an oxide semiconductor layer on the carbon thin...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: JUNG, Moonil, LEE, Kwanghee, KIM, Sangwook, KIM, Euntae, YANG, Jeeeun
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator JUNG, Moonil
LEE, Kwanghee
KIM, Sangwook
KIM, Euntae
YANG, Jeeeun
description Provided are a vertical transistor and a method of manufacturing the same. The vertical transistor includes a substrate, a lower electrode on the substrate and including a metal material, a carbon thin film being conductive and on the lower electrode, an oxide semiconductor layer on the carbon thin film, a gate electrode apart from the oxide semiconductor layer, a gate insulating layer arranged between the oxide semiconductor layer and the gate electrode, and an upper electrode on the oxide semiconductor layer, wherein the lower electrode. The carbon thin film, the oxide semiconductor layer, and the upper electrode are arranged in a direction perpendicular to the substrate.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024079468A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024079468A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024079468A13</originalsourceid><addsrcrecordid>eNrjZDAJcw0K8XR29FEICXL0C_YMDvEPUnD0c1HwdfQLdXN0DgkN8vRzV_B1DfHwd1EI8XANcvV342FgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgZGJgbmliZmFo6GxsSpAgCKASir</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>VERTICAL TRANSISTOR AND MANUFACTURING METHOD THEREOF</title><source>esp@cenet</source><creator>JUNG, Moonil ; LEE, Kwanghee ; KIM, Sangwook ; KIM, Euntae ; YANG, Jeeeun</creator><creatorcontrib>JUNG, Moonil ; LEE, Kwanghee ; KIM, Sangwook ; KIM, Euntae ; YANG, Jeeeun</creatorcontrib><description>Provided are a vertical transistor and a method of manufacturing the same. The vertical transistor includes a substrate, a lower electrode on the substrate and including a metal material, a carbon thin film being conductive and on the lower electrode, an oxide semiconductor layer on the carbon thin film, a gate electrode apart from the oxide semiconductor layer, a gate insulating layer arranged between the oxide semiconductor layer and the gate electrode, and an upper electrode on the oxide semiconductor layer, wherein the lower electrode. The carbon thin film, the oxide semiconductor layer, and the upper electrode are arranged in a direction perpendicular to the substrate.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240307&amp;DB=EPODOC&amp;CC=US&amp;NR=2024079468A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240307&amp;DB=EPODOC&amp;CC=US&amp;NR=2024079468A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>JUNG, Moonil</creatorcontrib><creatorcontrib>LEE, Kwanghee</creatorcontrib><creatorcontrib>KIM, Sangwook</creatorcontrib><creatorcontrib>KIM, Euntae</creatorcontrib><creatorcontrib>YANG, Jeeeun</creatorcontrib><title>VERTICAL TRANSISTOR AND MANUFACTURING METHOD THEREOF</title><description>Provided are a vertical transistor and a method of manufacturing the same. The vertical transistor includes a substrate, a lower electrode on the substrate and including a metal material, a carbon thin film being conductive and on the lower electrode, an oxide semiconductor layer on the carbon thin film, a gate electrode apart from the oxide semiconductor layer, a gate insulating layer arranged between the oxide semiconductor layer and the gate electrode, and an upper electrode on the oxide semiconductor layer, wherein the lower electrode. The carbon thin film, the oxide semiconductor layer, and the upper electrode are arranged in a direction perpendicular to the substrate.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAJcw0K8XR29FEICXL0C_YMDvEPUnD0c1HwdfQLdXN0DgkN8vRzV_B1DfHwd1EI8XANcvV342FgTUvMKU7lhdLcDMpuriHOHrqpBfnxqcUFicmpeakl8aHBRgZGJgbmliZmFo6GxsSpAgCKASir</recordid><startdate>20240307</startdate><enddate>20240307</enddate><creator>JUNG, Moonil</creator><creator>LEE, Kwanghee</creator><creator>KIM, Sangwook</creator><creator>KIM, Euntae</creator><creator>YANG, Jeeeun</creator><scope>EVB</scope></search><sort><creationdate>20240307</creationdate><title>VERTICAL TRANSISTOR AND MANUFACTURING METHOD THEREOF</title><author>JUNG, Moonil ; LEE, Kwanghee ; KIM, Sangwook ; KIM, Euntae ; YANG, Jeeeun</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024079468A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>JUNG, Moonil</creatorcontrib><creatorcontrib>LEE, Kwanghee</creatorcontrib><creatorcontrib>KIM, Sangwook</creatorcontrib><creatorcontrib>KIM, Euntae</creatorcontrib><creatorcontrib>YANG, Jeeeun</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>JUNG, Moonil</au><au>LEE, Kwanghee</au><au>KIM, Sangwook</au><au>KIM, Euntae</au><au>YANG, Jeeeun</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>VERTICAL TRANSISTOR AND MANUFACTURING METHOD THEREOF</title><date>2024-03-07</date><risdate>2024</risdate><abstract>Provided are a vertical transistor and a method of manufacturing the same. The vertical transistor includes a substrate, a lower electrode on the substrate and including a metal material, a carbon thin film being conductive and on the lower electrode, an oxide semiconductor layer on the carbon thin film, a gate electrode apart from the oxide semiconductor layer, a gate insulating layer arranged between the oxide semiconductor layer and the gate electrode, and an upper electrode on the oxide semiconductor layer, wherein the lower electrode. The carbon thin film, the oxide semiconductor layer, and the upper electrode are arranged in a direction perpendicular to the substrate.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2024079468A1
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title VERTICAL TRANSISTOR AND MANUFACTURING METHOD THEREOF
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-06T15%3A37%3A19IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=JUNG,%20Moonil&rft.date=2024-03-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024079468A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true