CONFIGURABLE PRIME NUMBER DIVIDER USING MULTI-PHASE CLOCKS

A device is provided that includes a counter circuit configured to count cycles of an input clock signal and to generate an output clock signal periodically based on a cycle count of the input clock signal; a multi-phase clock generator configured to generate a plurality of multi-phase clock signals...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Fallahi, Siavash, Nazemi, Ali, He, Tim Yee, RAO, Lakshmi, Cao, Jun
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS PULSE TECHNIQUE
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