APPARATUS AND METHOD FOR ADDRESS PRE-TRANSLATION TO ENHANCE DIRECT MEMORY ACCESS BY HARDWARE SUBSYSTEMS
Apparatus and method for performing address pre-translation to enhance direct memory access by hardware subsystems is described herein. An apparatus embodiment includes a processor to execute an enqueue instruction to submit, to a hardware subsystem, a job descriptor describing a job to be performed...
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creator | WANG, Junyuan XIE, Qianjun FAN, Zijuan WARDHAN, Amit K LI, Weigang GUO, Kaijie CHU, Tingqiang DAS, Mithilesh K JI, Maojun CUI, Bo |
description | Apparatus and method for performing address pre-translation to enhance direct memory access by hardware subsystems is described herein. An apparatus embodiment includes a processor to execute an enqueue instruction to submit, to a hardware subsystem, a job descriptor describing a job to be performed. The job descriptor includes virtual addresses of memory locations in which data required to perform the job are stored. An input-output memory management unit (IOMMU) is to obtain the address translations for the virtual addresses responsive to a pre-translation request from the processor. The address translations is obtained by the IOMMU prior to receiving a memory access request from the hardware subsystem. The IOMMU is to retrieve the data from the memory location using the address translations and to provide the retrieved data to the hardware subsystem to fulfill the request. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024020241A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024020241A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024020241A13</originalsourceid><addsrcrecordid>eNqNi8EKgkAQQL10iOofBjoLav3AuDuyQu7KzIh4EomtS5Rg_08JfUCX9y7vbZM7ti0yaieA3kJD6oKFKjCgtUwi0DKlyujlgloHDxqAvENvCGzNZPQ7NYEHQGPWvhzAIdsemUC6UgZRamSfbG7TY4mHn3fJsSI1Lo3za4zLPF3jM77HToqsOGcrcsxP_1UfwDQ2Pw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>APPARATUS AND METHOD FOR ADDRESS PRE-TRANSLATION TO ENHANCE DIRECT MEMORY ACCESS BY HARDWARE SUBSYSTEMS</title><source>esp@cenet</source><creator>WANG, Junyuan ; XIE, Qianjun ; FAN, Zijuan ; WARDHAN, Amit K ; LI, Weigang ; GUO, Kaijie ; CHU, Tingqiang ; DAS, Mithilesh K ; JI, Maojun ; CUI, Bo</creator><creatorcontrib>WANG, Junyuan ; XIE, Qianjun ; FAN, Zijuan ; WARDHAN, Amit K ; LI, Weigang ; GUO, Kaijie ; CHU, Tingqiang ; DAS, Mithilesh K ; JI, Maojun ; CUI, Bo</creatorcontrib><description>Apparatus and method for performing address pre-translation to enhance direct memory access by hardware subsystems is described herein. An apparatus embodiment includes a processor to execute an enqueue instruction to submit, to a hardware subsystem, a job descriptor describing a job to be performed. The job descriptor includes virtual addresses of memory locations in which data required to perform the job are stored. An input-output memory management unit (IOMMU) is to obtain the address translations for the virtual addresses responsive to a pre-translation request from the processor. The address translations is obtained by the IOMMU prior to receiving a memory access request from the hardware subsystem. The IOMMU is to retrieve the data from the memory location using the address translations and to provide the retrieved data to the hardware subsystem to fulfill the request.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240118&DB=EPODOC&CC=US&NR=2024020241A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240118&DB=EPODOC&CC=US&NR=2024020241A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WANG, Junyuan</creatorcontrib><creatorcontrib>XIE, Qianjun</creatorcontrib><creatorcontrib>FAN, Zijuan</creatorcontrib><creatorcontrib>WARDHAN, Amit K</creatorcontrib><creatorcontrib>LI, Weigang</creatorcontrib><creatorcontrib>GUO, Kaijie</creatorcontrib><creatorcontrib>CHU, Tingqiang</creatorcontrib><creatorcontrib>DAS, Mithilesh K</creatorcontrib><creatorcontrib>JI, Maojun</creatorcontrib><creatorcontrib>CUI, Bo</creatorcontrib><title>APPARATUS AND METHOD FOR ADDRESS PRE-TRANSLATION TO ENHANCE DIRECT MEMORY ACCESS BY HARDWARE SUBSYSTEMS</title><description>Apparatus and method for performing address pre-translation to enhance direct memory access by hardware subsystems is described herein. An apparatus embodiment includes a processor to execute an enqueue instruction to submit, to a hardware subsystem, a job descriptor describing a job to be performed. The job descriptor includes virtual addresses of memory locations in which data required to perform the job are stored. An input-output memory management unit (IOMMU) is to obtain the address translations for the virtual addresses responsive to a pre-translation request from the processor. The address translations is obtained by the IOMMU prior to receiving a memory access request from the hardware subsystem. The IOMMU is to retrieve the data from the memory location using the address translations and to provide the retrieved data to the hardware subsystem to fulfill the request.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNi8EKgkAQQL10iOofBjoLav3AuDuyQu7KzIh4EomtS5Rg_08JfUCX9y7vbZM7ti0yaieA3kJD6oKFKjCgtUwi0DKlyujlgloHDxqAvENvCGzNZPQ7NYEHQGPWvhzAIdsemUC6UgZRamSfbG7TY4mHn3fJsSI1Lo3za4zLPF3jM77HToqsOGcrcsxP_1UfwDQ2Pw</recordid><startdate>20240118</startdate><enddate>20240118</enddate><creator>WANG, Junyuan</creator><creator>XIE, Qianjun</creator><creator>FAN, Zijuan</creator><creator>WARDHAN, Amit K</creator><creator>LI, Weigang</creator><creator>GUO, Kaijie</creator><creator>CHU, Tingqiang</creator><creator>DAS, Mithilesh K</creator><creator>JI, Maojun</creator><creator>CUI, Bo</creator><scope>EVB</scope></search><sort><creationdate>20240118</creationdate><title>APPARATUS AND METHOD FOR ADDRESS PRE-TRANSLATION TO ENHANCE DIRECT MEMORY ACCESS BY HARDWARE SUBSYSTEMS</title><author>WANG, Junyuan ; XIE, Qianjun ; FAN, Zijuan ; WARDHAN, Amit K ; LI, Weigang ; GUO, Kaijie ; CHU, Tingqiang ; DAS, Mithilesh K ; JI, Maojun ; CUI, Bo</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024020241A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>WANG, Junyuan</creatorcontrib><creatorcontrib>XIE, Qianjun</creatorcontrib><creatorcontrib>FAN, Zijuan</creatorcontrib><creatorcontrib>WARDHAN, Amit K</creatorcontrib><creatorcontrib>LI, Weigang</creatorcontrib><creatorcontrib>GUO, Kaijie</creatorcontrib><creatorcontrib>CHU, Tingqiang</creatorcontrib><creatorcontrib>DAS, Mithilesh K</creatorcontrib><creatorcontrib>JI, Maojun</creatorcontrib><creatorcontrib>CUI, Bo</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WANG, Junyuan</au><au>XIE, Qianjun</au><au>FAN, Zijuan</au><au>WARDHAN, Amit K</au><au>LI, Weigang</au><au>GUO, Kaijie</au><au>CHU, Tingqiang</au><au>DAS, Mithilesh K</au><au>JI, Maojun</au><au>CUI, Bo</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>APPARATUS AND METHOD FOR ADDRESS PRE-TRANSLATION TO ENHANCE DIRECT MEMORY ACCESS BY HARDWARE SUBSYSTEMS</title><date>2024-01-18</date><risdate>2024</risdate><abstract>Apparatus and method for performing address pre-translation to enhance direct memory access by hardware subsystems is described herein. An apparatus embodiment includes a processor to execute an enqueue instruction to submit, to a hardware subsystem, a job descriptor describing a job to be performed. The job descriptor includes virtual addresses of memory locations in which data required to perform the job are stored. An input-output memory management unit (IOMMU) is to obtain the address translations for the virtual addresses responsive to a pre-translation request from the processor. The address translations is obtained by the IOMMU prior to receiving a memory access request from the hardware subsystem. The IOMMU is to retrieve the data from the memory location using the address translations and to provide the retrieved data to the hardware subsystem to fulfill the request.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | APPARATUS AND METHOD FOR ADDRESS PRE-TRANSLATION TO ENHANCE DIRECT MEMORY ACCESS BY HARDWARE SUBSYSTEMS |
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