HIGH VOLTAGE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF HIGH VOLTAGE SEMICONDUCTOR DEVICE
A semiconductor device includes a deep well region located on a substrate, a drift region located in the deep well region, a first gate electrode that overlaps with the first body region and the drift region, a second gate electrode that overlaps with the second body region and the drift region, a f...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | LEE, Tae Hoon CHUNG, Jin Seong |
description | A semiconductor device includes a deep well region located on a substrate, a drift region located in the deep well region, a first gate electrode that overlaps with the first body region and the drift region, a second gate electrode that overlaps with the second body region and the drift region, a first source region and a second source region located in the first and second body regions, respectively, a drain region located in the drift region and disposed between the first gate electrode and the second gate electrode, a silicide layer located on the substrate, a first non-silicide layer located between the drain region and the first gate electrode, wherein the first non-silicide layer extends over a top surface of the first gate electrode, and a first field plate contact plug in contact with the first non-silicide layer. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2023411519A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2023411519A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2023411519A13</originalsourceid><addsrcrecordid>eNrjZIj38HT3UAjz9wlxdHdVCHb19XT293MJdQ7xD1JwcQ3zdHZVcPRzUfB19At1c3QOCQ3y9HNX8HUN8fB3UfB3UyCom4eBNS0xpziVF0pzMyi7uYY4e-imFuTHpxYXJCan5qWWxIcGGxkYGZsYGpoaWjoaGhOnCgAZvTQR</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>HIGH VOLTAGE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF HIGH VOLTAGE SEMICONDUCTOR DEVICE</title><source>esp@cenet</source><creator>LEE, Tae Hoon ; CHUNG, Jin Seong</creator><creatorcontrib>LEE, Tae Hoon ; CHUNG, Jin Seong</creatorcontrib><description>A semiconductor device includes a deep well region located on a substrate, a drift region located in the deep well region, a first gate electrode that overlaps with the first body region and the drift region, a second gate electrode that overlaps with the second body region and the drift region, a first source region and a second source region located in the first and second body regions, respectively, a drain region located in the drift region and disposed between the first gate electrode and the second gate electrode, a silicide layer located on the substrate, a first non-silicide layer located between the drain region and the first gate electrode, wherein the first non-silicide layer extends over a top surface of the first gate electrode, and a first field plate contact plug in contact with the first non-silicide layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231221&DB=EPODOC&CC=US&NR=2023411519A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231221&DB=EPODOC&CC=US&NR=2023411519A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LEE, Tae Hoon</creatorcontrib><creatorcontrib>CHUNG, Jin Seong</creatorcontrib><title>HIGH VOLTAGE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF HIGH VOLTAGE SEMICONDUCTOR DEVICE</title><description>A semiconductor device includes a deep well region located on a substrate, a drift region located in the deep well region, a first gate electrode that overlaps with the first body region and the drift region, a second gate electrode that overlaps with the second body region and the drift region, a first source region and a second source region located in the first and second body regions, respectively, a drain region located in the drift region and disposed between the first gate electrode and the second gate electrode, a silicide layer located on the substrate, a first non-silicide layer located between the drain region and the first gate electrode, wherein the first non-silicide layer extends over a top surface of the first gate electrode, and a first field plate contact plug in contact with the first non-silicide layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZIj38HT3UAjz9wlxdHdVCHb19XT293MJdQ7xD1JwcQ3zdHZVcPRzUfB19At1c3QOCQ3y9HNX8HUN8fB3UfB3UyCom4eBNS0xpziVF0pzMyi7uYY4e-imFuTHpxYXJCan5qWWxIcGGxkYGZsYGpoaWjoaGhOnCgAZvTQR</recordid><startdate>20231221</startdate><enddate>20231221</enddate><creator>LEE, Tae Hoon</creator><creator>CHUNG, Jin Seong</creator><scope>EVB</scope></search><sort><creationdate>20231221</creationdate><title>HIGH VOLTAGE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF HIGH VOLTAGE SEMICONDUCTOR DEVICE</title><author>LEE, Tae Hoon ; CHUNG, Jin Seong</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2023411519A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LEE, Tae Hoon</creatorcontrib><creatorcontrib>CHUNG, Jin Seong</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LEE, Tae Hoon</au><au>CHUNG, Jin Seong</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>HIGH VOLTAGE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF HIGH VOLTAGE SEMICONDUCTOR DEVICE</title><date>2023-12-21</date><risdate>2023</risdate><abstract>A semiconductor device includes a deep well region located on a substrate, a drift region located in the deep well region, a first gate electrode that overlaps with the first body region and the drift region, a second gate electrode that overlaps with the second body region and the drift region, a first source region and a second source region located in the first and second body regions, respectively, a drain region located in the drift region and disposed between the first gate electrode and the second gate electrode, a silicide layer located on the substrate, a first non-silicide layer located between the drain region and the first gate electrode, wherein the first non-silicide layer extends over a top surface of the first gate electrode, and a first field plate contact plug in contact with the first non-silicide layer.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2023411519A1 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | HIGH VOLTAGE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF HIGH VOLTAGE SEMICONDUCTOR DEVICE |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-28T17%3A31%3A49IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LEE,%20Tae%20Hoon&rft.date=2023-12-21&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2023411519A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |