MEMORY ARRAYS EMPLOYING FLYING BIT LINES TO INCREASE EFFECTIVE BIT LINE LENGTH FOR SUPPORTING HIGHER PERFORMANCE, INCREASED MEMORY DENSITY, AND RELATED METHODS

Memory arrays employing flying bit lines to increase effective bit line length for supporting higher performance, increased memory density, and related methods. To increase memory density, the memory array has a first memory sub-bank and one or more second memory sub-banks. The first memory sub-bank...

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Bibliographische Detailangaben

Hauptverfasser:	SWEITZER, Robert A, KOLAR, Pramod
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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