Enabling a Multi-Chip Daisy Chain Topology using Peripheral Component Interconnect Express (PCIe)

A system-on-chip (SoC) may be configured to enable a Multi-Chip Daisy Chain Topology using peripheral component interface express (PCIe). The SoC may include a processor, a local memory, a root complex operably connected to the processor and the local memory, and a multi-function endpoint controller...

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Bibliographische Detailangaben

Hauptverfasser:	GOVINDARAJAN, Sriramakrishnan, ISRAEL VIJAYPONRAJ, Kishon Vijay Abraham, MODY, Mihir Narendra
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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