CALCULATION CIRCUIT, COMMUNICATION DEVICE, CONTROL CIRCUIT, STORAGE MEDIUM, AND CALCULATION METHOD

A calculation circuit includes: processing circuitry that divides a quantized signal into a first bit string and a second bit string, and converts the first bit string into a sequence including two or more bits and representing a numerical value by a ratio of 1 present therein; calculates the sequen...

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Hauptverfasser: TANI, Shigenori, YAMASHITA, Yasutaka
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creator TANI, Shigenori
YAMASHITA, Yasutaka
description A calculation circuit includes: processing circuitry that divides a quantized signal into a first bit string and a second bit string, and converts the first bit string into a sequence including two or more bits and representing a numerical value by a ratio of 1 present therein; calculates the sequence converted by the conversion unit by stochastic signal processing using a combinational circuit; and adds a ratio of 1 present in a sequence after calculation and a value obtained by multiplying the second bit string by a number represented by the first bit string, and performs reconversion into a quantized signal.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2023367552A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2023367552A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2023367552A13</originalsourceid><addsrcrecordid>eNrjZEhydvRxDvVxDPH091Nw9gxyDvUM0VFw9vf1DfXzdIYIu7iGeTq7gkT9QoL8fRDKgkP8gxzdXRV8XV08Q311FBz9XBSQzfN1DfHwd-FhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRsbGZuampkaOhsbEqQIAqh00yA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>CALCULATION CIRCUIT, COMMUNICATION DEVICE, CONTROL CIRCUIT, STORAGE MEDIUM, AND CALCULATION METHOD</title><source>esp@cenet</source><creator>TANI, Shigenori ; YAMASHITA, Yasutaka</creator><creatorcontrib>TANI, Shigenori ; YAMASHITA, Yasutaka</creatorcontrib><description>A calculation circuit includes: processing circuitry that divides a quantized signal into a first bit string and a second bit string, and converts the first bit string into a sequence including two or more bits and representing a numerical value by a ratio of 1 present therein; calculates the sequence converted by the conversion unit by stochastic signal processing using a combinational circuit; and adds a ratio of 1 present in a sequence after calculation and a value obtained by multiplying the second bit string by a number represented by the first bit string, and performs reconversion into a quantized signal.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20231116&amp;DB=EPODOC&amp;CC=US&amp;NR=2023367552A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20231116&amp;DB=EPODOC&amp;CC=US&amp;NR=2023367552A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TANI, Shigenori</creatorcontrib><creatorcontrib>YAMASHITA, Yasutaka</creatorcontrib><title>CALCULATION CIRCUIT, COMMUNICATION DEVICE, CONTROL CIRCUIT, STORAGE MEDIUM, AND CALCULATION METHOD</title><description>A calculation circuit includes: processing circuitry that divides a quantized signal into a first bit string and a second bit string, and converts the first bit string into a sequence including two or more bits and representing a numerical value by a ratio of 1 present therein; calculates the sequence converted by the conversion unit by stochastic signal processing using a combinational circuit; and adds a ratio of 1 present in a sequence after calculation and a value obtained by multiplying the second bit string by a number represented by the first bit string, and performs reconversion into a quantized signal.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZEhydvRxDvVxDPH091Nw9gxyDvUM0VFw9vf1DfXzdIYIu7iGeTq7gkT9QoL8fRDKgkP8gxzdXRV8XV08Q311FBz9XBSQzfN1DfHwd-FhYE1LzClO5YXS3AzKbq4hzh66qQX58anFBYnJqXmpJfGhwUYGRsbGZuampkaOhsbEqQIAqh00yA</recordid><startdate>20231116</startdate><enddate>20231116</enddate><creator>TANI, Shigenori</creator><creator>YAMASHITA, Yasutaka</creator><scope>EVB</scope></search><sort><creationdate>20231116</creationdate><title>CALCULATION CIRCUIT, COMMUNICATION DEVICE, CONTROL CIRCUIT, STORAGE MEDIUM, AND CALCULATION METHOD</title><author>TANI, Shigenori ; YAMASHITA, Yasutaka</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2023367552A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>TANI, Shigenori</creatorcontrib><creatorcontrib>YAMASHITA, Yasutaka</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TANI, Shigenori</au><au>YAMASHITA, Yasutaka</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>CALCULATION CIRCUIT, COMMUNICATION DEVICE, CONTROL CIRCUIT, STORAGE MEDIUM, AND CALCULATION METHOD</title><date>2023-11-16</date><risdate>2023</risdate><abstract>A calculation circuit includes: processing circuitry that divides a quantized signal into a first bit string and a second bit string, and converts the first bit string into a sequence including two or more bits and representing a numerical value by a ratio of 1 present therein; calculates the sequence converted by the conversion unit by stochastic signal processing using a combinational circuit; and adds a ratio of 1 present in a sequence after calculation and a value obtained by multiplying the second bit string by a number represented by the first bit string, and performs reconversion into a quantized signal.</abstract><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title CALCULATION CIRCUIT, COMMUNICATION DEVICE, CONTROL CIRCUIT, STORAGE MEDIUM, AND CALCULATION METHOD
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-09T22%3A56%3A31IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=TANI,%20Shigenori&rft.date=2023-11-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2023367552A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true