SWITCHABLE TERMINATION RESISTANCE CIRCUIT
The disclosure relates to a switchable termination resistance circuit for a transceiver physical layer interface. Example embodiments include a switchable termination resistance circuit (1101) for a transmission line transceiver (1301), the switchable termination resistance circuit (1101) comprising...
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creator | Mouret, Guillaume Huot-Marchand, Alexis Nathanael |
description | The disclosure relates to a switchable termination resistance circuit for a transceiver physical layer interface. Example embodiments include a switchable termination resistance circuit (1101) for a transmission line transceiver (1301), the switchable termination resistance circuit (1101) comprising: first and second terminals (TXP, TXN) for connection to a transmission line (803); first and second NMOS termination resistance switches (Mnsw1, Mnsw2) having source connections connected together at a midpoint node (1103) and gate connections connected to an input node (1104); a first resistor (R1) connected between the first terminal (TXP) and a drain connection of the first NMOS termination resistance switch (Mnsw1); a second resistor (R2) connected between the second terminal (TXN) and a drain connection of the second NMOS termination resistance switch (Mnsw2); a Zener diode (Dz1) having a cathode side connected to the input node (1104) and an anode side connected to the midpoint node (1103); and a branch (1107) comprising a second Zener diode (Dz2), a branch diode (D3), a branch NMOS switch (Mn4) and a branch PMOS switch (Mp7) in a series connected arrangement between the midpoint node (1103) and a ground line (AGND). |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2023353129A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2023353129A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2023353129A13</originalsourceid><addsrcrecordid>eNrjZNAMDvcMcfZwdPJxVQhxDfL19HMM8fT3UwhyDfYMDnH0c3ZVcPYMcg71DOFhYE1LzClO5YXS3AzKbq5ArbqpBfnxqcUFicmpeakl8aHBRgZGxsamxoZGlo6GxsSpAgDfuyWU</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SWITCHABLE TERMINATION RESISTANCE CIRCUIT</title><source>esp@cenet</source><creator>Mouret, Guillaume ; Huot-Marchand, Alexis Nathanael</creator><creatorcontrib>Mouret, Guillaume ; Huot-Marchand, Alexis Nathanael</creatorcontrib><description>The disclosure relates to a switchable termination resistance circuit for a transceiver physical layer interface. Example embodiments include a switchable termination resistance circuit (1101) for a transmission line transceiver (1301), the switchable termination resistance circuit (1101) comprising: first and second terminals (TXP, TXN) for connection to a transmission line (803); first and second NMOS termination resistance switches (Mnsw1, Mnsw2) having source connections connected together at a midpoint node (1103) and gate connections connected to an input node (1104); a first resistor (R1) connected between the first terminal (TXP) and a drain connection of the first NMOS termination resistance switch (Mnsw1); a second resistor (R2) connected between the second terminal (TXN) and a drain connection of the second NMOS termination resistance switch (Mnsw2); a Zener diode (Dz1) having a cathode side connected to the input node (1104) and an anode side connected to the midpoint node (1103); and a branch (1107) comprising a second Zener diode (Dz2), a branch diode (D3), a branch NMOS switch (Mn4) and a branch PMOS switch (Mp7) in a series connected arrangement between the midpoint node (1103) and a ground line (AGND).</description><language>eng</language><subject>AMPLIFIERS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS ; RESONATORS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231102&DB=EPODOC&CC=US&NR=2023353129A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231102&DB=EPODOC&CC=US&NR=2023353129A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Mouret, Guillaume</creatorcontrib><creatorcontrib>Huot-Marchand, Alexis Nathanael</creatorcontrib><title>SWITCHABLE TERMINATION RESISTANCE CIRCUIT</title><description>The disclosure relates to a switchable termination resistance circuit for a transceiver physical layer interface. Example embodiments include a switchable termination resistance circuit (1101) for a transmission line transceiver (1301), the switchable termination resistance circuit (1101) comprising: first and second terminals (TXP, TXN) for connection to a transmission line (803); first and second NMOS termination resistance switches (Mnsw1, Mnsw2) having source connections connected together at a midpoint node (1103) and gate connections connected to an input node (1104); a first resistor (R1) connected between the first terminal (TXP) and a drain connection of the first NMOS termination resistance switch (Mnsw1); a second resistor (R2) connected between the second terminal (TXN) and a drain connection of the second NMOS termination resistance switch (Mnsw2); a Zener diode (Dz1) having a cathode side connected to the input node (1104) and an anode side connected to the midpoint node (1103); and a branch (1107) comprising a second Zener diode (Dz2), a branch diode (D3), a branch NMOS switch (Mn4) and a branch PMOS switch (Mp7) in a series connected arrangement between the midpoint node (1103) and a ground line (AGND).</description><subject>AMPLIFIERS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS</subject><subject>RESONATORS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAMDvcMcfZwdPJxVQhxDfL19HMM8fT3UwhyDfYMDnH0c3ZVcPYMcg71DOFhYE1LzClO5YXS3AzKbq5ArbqpBfnxqcUFicmpeakl8aHBRgZGxsamxoZGlo6GxsSpAgDfuyWU</recordid><startdate>20231102</startdate><enddate>20231102</enddate><creator>Mouret, Guillaume</creator><creator>Huot-Marchand, Alexis Nathanael</creator><scope>EVB</scope></search><sort><creationdate>20231102</creationdate><title>SWITCHABLE TERMINATION RESISTANCE CIRCUIT</title><author>Mouret, Guillaume ; Huot-Marchand, Alexis Nathanael</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2023353129A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>AMPLIFIERS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS</topic><topic>RESONATORS</topic><toplevel>online_resources</toplevel><creatorcontrib>Mouret, Guillaume</creatorcontrib><creatorcontrib>Huot-Marchand, Alexis Nathanael</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Mouret, Guillaume</au><au>Huot-Marchand, Alexis Nathanael</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SWITCHABLE TERMINATION RESISTANCE CIRCUIT</title><date>2023-11-02</date><risdate>2023</risdate><abstract>The disclosure relates to a switchable termination resistance circuit for a transceiver physical layer interface. Example embodiments include a switchable termination resistance circuit (1101) for a transmission line transceiver (1301), the switchable termination resistance circuit (1101) comprising: first and second terminals (TXP, TXN) for connection to a transmission line (803); first and second NMOS termination resistance switches (Mnsw1, Mnsw2) having source connections connected together at a midpoint node (1103) and gate connections connected to an input node (1104); a first resistor (R1) connected between the first terminal (TXP) and a drain connection of the first NMOS termination resistance switch (Mnsw1); a second resistor (R2) connected between the second terminal (TXN) and a drain connection of the second NMOS termination resistance switch (Mnsw2); a Zener diode (Dz1) having a cathode side connected to the input node (1104) and an anode side connected to the midpoint node (1103); and a branch (1107) comprising a second Zener diode (Dz2), a branch diode (D3), a branch NMOS switch (Mn4) and a branch PMOS switch (Mp7) in a series connected arrangement between the midpoint node (1103) and a ground line (AGND).</abstract><oa>free_for_read</oa></addata></record> |
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subjects | AMPLIFIERS BASIC ELECTRONIC CIRCUITRY ELECTRICITY IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS RESONATORS |
title | SWITCHABLE TERMINATION RESISTANCE CIRCUIT |
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