DEVICE AND METHOD FOR SELECTING CLOCK FREQUENCY IN MASTER DEVICE OF BUS SYSTEM

To increase an overall access speed and a performance of a bus system, in the present disclosure, a master device is designed to use a clock signal with different clock frequencies to address slave devices and read/write data from/to the slave devices. In an address phase, a first operating frequenc...

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1. Verfasser: CHENG, NAI-WEN
Format: Patent
Sprache:eng
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