Backside Routing Implementation in SRAM Arrays

Various implementations of backside and topside routing of bitlines and wordlines in memory arrays are disclosed. Bitlines in backside and topside metal layers may be alternated between adjacent bit cells in a memory array. Alternating the location of the bitlines between bit cells in the memory arr...

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Bibliographische Detailangaben

Hauptverfasser:	Bhatia, Ajay, Abu-Rahma, Mohamed H, Oliva, Antonietta, Nazar, Shahzad
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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