PACKAGE STRUCTURE OF EMBEDDED POWER MODULE WITH LOW PARASITIC INDUCTANCE AND HIGH HEAT DISSIPATION EFFICIENCY

PACKAGE STRUCTURE OF EMBEDDED POWER MODULE WITH LOW PARASITIC INDUCTANCE AND HIGH HEAT DISSIPATION EFFICIENCY

A package structure of an embedded power module includes a top insulation layer, a top metal pattern layer, a solder layer, a device layer, a bottom metal pattern layer and a bottom insulation layer sequentially arranged from top to bottom. The device layer includes at least two MOSFET bare dies and...

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Hauptverfasser: Sun, Xinnan, Chen, Min, Zhang, Dongbo, Wang, Xiaoqing, Li, Bodong
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Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator Sun, Xinnan
Chen, Min
Zhang, Dongbo
Wang, Xiaoqing
Li, Bodong
description A package structure of an embedded power module includes a top insulation layer, a top metal pattern layer, a solder layer, a device layer, a bottom metal pattern layer and a bottom insulation layer sequentially arranged from top to bottom. The device layer includes at least two MOSFET bare dies and several metal connection blocks, and is filled with insulation filler to isolate the MOSFET bare dies and the metal connection blocks from each other. The drain electrodes of the bare dies are connected with the top metal pattern layer through the solder layer, and the source electrodes and the gate electrodes of the bare dies are electrically connected to the bottom metal pattern layer, respectively. The upper and lower surfaces of the metal connection blocks are electrically connected to the top metal pattern layer and the bottom metal pattern layer, respectively.
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title PACKAGE STRUCTURE OF EMBEDDED POWER MODULE WITH LOW PARASITIC INDUCTANCE AND HIGH HEAT DISSIPATION EFFICIENCY
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