SEMICONDUCTOR MEMORY DEVICE

According to one embodiment, a semiconductor memory device includes a stacked body with first conductive layers and first insulating layers alternately stacked. The stacked body includes a staircase portion in which the first conductive layers are in a staircase shape. A columnar portion extends in a stacking direction through the stacked body at the staircase portion. The columnar portion includes a semiconductor layer, a second insulating layer covering a side wall of the semiconductor layer, and a third insulating layer that covers the second insulating layer. The third insulating layer includes a material different from the second insulating layer and includes flanged portions that protrude from a sidewall thereof toward the first conductive layers at corresponding height positions.