DUAL DUTY CYCLE CORRECTION LOOP FOR A SERIALIZER/DESERIALIZER (SERDES) TRANSMITTER OUTPUT

Aspects of the invention include receiving, by a controller, an indication of a chip initialization for a duty cycle correction (DCC) circuit, wherein the duty cycle correction circuit includes a main path including a main multiplexer (MUX) having a first input and a main driver circuit, a replica p...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Lukes, Eric John, Qi, Jieming, Wiedemeier, Glen A, Dickson, Timothy O, Cox, Carrie Ellen, Dreps, Daniel Mark
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!