UNDER-BUMP-METALLIZATION STRUCTURE AND REDISTRIBUTION LAYER DESIGN FOR INTEGRATED FAN-OUT PACKAGE WITH INTEGRATED PASSIVE DEVICE
A semiconductor package includes an integrated passive device (IPD) including one or more passive devices over a first substrate; and metallization layers over and electrically coupled to the one or more passive devices, where a topmost metallization layer of the metallization layers includes a firs...
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creator | Tseng, Ying-Cheng Yu, Chen-Hua Huang, Yu-Chih Kuo, Ting-Ting Liu, Chiahung Lai, Chi-Hui Tai, Chih-Hsuan Wang, Chuei-Tang Wu, Ban-Li Tsai, Hao-Yi Liu, Chung-Shi |
description | A semiconductor package includes an integrated passive device (IPD) including one or more passive devices over a first substrate; and metallization layers over and electrically coupled to the one or more passive devices, where a topmost metallization layer of the metallization layers includes a first plurality of conductive patterns; and a second plurality of conductive patterns interleaved with the first plurality of conductive patterns. The IPD also includes a first under bump metallization (UBM) structure over the topmost metallization layer, where the first UBM structure includes a first plurality of conductive strips, each of the first plurality of conductive strips electrically coupled to a respective one of the first plurality of conductive patterns; and a second plurality of conductive strips interleaved with the first plurality of conductive strips, each of the second plurality of conductive strips electrically coupled to a respective one of the second plurality of conductive patterns. |
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The IPD also includes a first under bump metallization (UBM) structure over the topmost metallization layer, where the first UBM structure includes a first plurality of conductive strips, each of the first plurality of conductive strips electrically coupled to a respective one of the first plurality of conductive patterns; and a second plurality of conductive strips interleaved with the first plurality of conductive strips, each of the second plurality of conductive strips electrically coupled to a respective one of the second plurality of conductive patterns.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230810&DB=EPODOC&CC=US&NR=2023253384A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76318</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230810&DB=EPODOC&CC=US&NR=2023253384A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Tseng, Ying-Cheng</creatorcontrib><creatorcontrib>Yu, Chen-Hua</creatorcontrib><creatorcontrib>Huang, Yu-Chih</creatorcontrib><creatorcontrib>Kuo, Ting-Ting</creatorcontrib><creatorcontrib>Liu, Chiahung</creatorcontrib><creatorcontrib>Lai, Chi-Hui</creatorcontrib><creatorcontrib>Tai, Chih-Hsuan</creatorcontrib><creatorcontrib>Wang, Chuei-Tang</creatorcontrib><creatorcontrib>Wu, Ban-Li</creatorcontrib><creatorcontrib>Tsai, Hao-Yi</creatorcontrib><creatorcontrib>Liu, Chung-Shi</creatorcontrib><title>UNDER-BUMP-METALLIZATION STRUCTURE AND REDISTRIBUTION LAYER DESIGN FOR INTEGRATED FAN-OUT PACKAGE WITH INTEGRATED PASSIVE DEVICE</title><description>A semiconductor package includes an integrated passive device (IPD) including one or more passive devices over a first substrate; and metallization layers over and electrically coupled to the one or more passive devices, where a topmost metallization layer of the metallization layers includes a first plurality of conductive patterns; and a second plurality of conductive patterns interleaved with the first plurality of conductive patterns. The IPD also includes a first under bump metallization (UBM) structure over the topmost metallization layer, where the first UBM structure includes a first plurality of conductive strips, each of the first plurality of conductive strips electrically coupled to a respective one of the first plurality of conductive patterns; and a second plurality of conductive strips interleaved with the first plurality of conductive strips, each of the second plurality of conductive strips electrically coupled to a respective one of the second plurality of conductive patterns.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNi8EKgkAURd20iOofHrQWSgvaPp2nPrJRZt4YtRGJaRUl2Af06Um0aNnqwD33TIOX04pMmLhDHR5IsCz5jMKVBivGpeIMAWoFhhSPCyfuI0s8kQFFlnMNWWWAtVBuUEhBhjqsnECN6R5zgiNL8etrtJYbGuuGU5oHk2t3G_ziy1mwzEjSIvT9o_VD31383T9bZ6NVFEfbON5tcB3_93oDxQY9mA</recordid><startdate>20230810</startdate><enddate>20230810</enddate><creator>Tseng, Ying-Cheng</creator><creator>Yu, Chen-Hua</creator><creator>Huang, Yu-Chih</creator><creator>Kuo, Ting-Ting</creator><creator>Liu, Chiahung</creator><creator>Lai, Chi-Hui</creator><creator>Tai, Chih-Hsuan</creator><creator>Wang, Chuei-Tang</creator><creator>Wu, Ban-Li</creator><creator>Tsai, Hao-Yi</creator><creator>Liu, Chung-Shi</creator><scope>EVB</scope></search><sort><creationdate>20230810</creationdate><title>UNDER-BUMP-METALLIZATION STRUCTURE AND REDISTRIBUTION LAYER DESIGN FOR INTEGRATED FAN-OUT PACKAGE WITH INTEGRATED PASSIVE DEVICE</title><author>Tseng, Ying-Cheng ; Yu, Chen-Hua ; Huang, Yu-Chih ; Kuo, Ting-Ting ; Liu, Chiahung ; Lai, Chi-Hui ; Tai, Chih-Hsuan ; Wang, Chuei-Tang ; Wu, Ban-Li ; Tsai, Hao-Yi ; Liu, Chung-Shi</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2023253384A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Tseng, Ying-Cheng</creatorcontrib><creatorcontrib>Yu, Chen-Hua</creatorcontrib><creatorcontrib>Huang, Yu-Chih</creatorcontrib><creatorcontrib>Kuo, Ting-Ting</creatorcontrib><creatorcontrib>Liu, Chiahung</creatorcontrib><creatorcontrib>Lai, Chi-Hui</creatorcontrib><creatorcontrib>Tai, Chih-Hsuan</creatorcontrib><creatorcontrib>Wang, Chuei-Tang</creatorcontrib><creatorcontrib>Wu, Ban-Li</creatorcontrib><creatorcontrib>Tsai, Hao-Yi</creatorcontrib><creatorcontrib>Liu, Chung-Shi</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Tseng, Ying-Cheng</au><au>Yu, Chen-Hua</au><au>Huang, Yu-Chih</au><au>Kuo, Ting-Ting</au><au>Liu, Chiahung</au><au>Lai, Chi-Hui</au><au>Tai, Chih-Hsuan</au><au>Wang, Chuei-Tang</au><au>Wu, Ban-Li</au><au>Tsai, Hao-Yi</au><au>Liu, Chung-Shi</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>UNDER-BUMP-METALLIZATION STRUCTURE AND REDISTRIBUTION LAYER DESIGN FOR INTEGRATED FAN-OUT PACKAGE WITH INTEGRATED PASSIVE DEVICE</title><date>2023-08-10</date><risdate>2023</risdate><abstract>A semiconductor package includes an integrated passive device (IPD) including one or more passive devices over a first substrate; and metallization layers over and electrically coupled to the one or more passive devices, where a topmost metallization layer of the metallization layers includes a first plurality of conductive patterns; and a second plurality of conductive patterns interleaved with the first plurality of conductive patterns. The IPD also includes a first under bump metallization (UBM) structure over the topmost metallization layer, where the first UBM structure includes a first plurality of conductive strips, each of the first plurality of conductive strips electrically coupled to a respective one of the first plurality of conductive patterns; and a second plurality of conductive strips interleaved with the first plurality of conductive strips, each of the second plurality of conductive strips electrically coupled to a respective one of the second plurality of conductive patterns.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | UNDER-BUMP-METALLIZATION STRUCTURE AND REDISTRIBUTION LAYER DESIGN FOR INTEGRATED FAN-OUT PACKAGE WITH INTEGRATED PASSIVE DEVICE |
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