SYSTEMS AND METHODS FOR FAULT-RESILIENT SYSTEM MANAGEMENT RANDOM ACCESS MEMORY
A method may include, during a PEI phase BIOS, responsive to a flag being set in a previous boot session of an information handling system to test a first designated region of a memory of the information handling system: testing the first designated region for a memory fault; in response to detectin...
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| creator | ARMS, Michael W IYER, Vivek Viswanathan SAMUEL, Balasingh P |
| description | A method may include, during a PEI phase BIOS, responsive to a flag being set in a previous boot session of an information handling system to test a first designated region of a memory of the information handling system: testing the first designated region for a memory fault; in response to detecting the memory fault, mapping out the first designated region and designating an additional region of the memory as a designated region for SMRAM and repeating testing of additional designated regions, mapping out of failed additional designated regions, and designating new additional regions of the memory until a designated region passes testing without memory fault; and in response to detecting passage of testing without memory fault of a designated region comprising either of the first designated region or an additional region of the memory, configuring the designated region for use as the SMRAM for the information handling system. |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES |
| title | SYSTEMS AND METHODS FOR FAULT-RESILIENT SYSTEM MANAGEMENT RANDOM ACCESS MEMORY |
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