STRESS LAYOUT OPTIMIZATION FOR DEVICE PERFORMANCE

The present disclosure relates to semiconductor structures and, more particularly, to a layout optimization for radio frequency (RF) device performance and methods of manufacture. The structure includes: a first active device on a substrate; source and drain diffusion regions adjacent to the first a...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	UTESS, Dirk, SAADAT, Irfan A, KLEIMAIER, Dominik M, ZHAO, Zhixing, RAVAUX, Florent
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!