ADDRESS FAULT DETECTION

Methods, systems, and devices for address fault detection are described. In some examples, a memory device may receive a command (e.g., a write command) and data, and may generate a set of parity bits based on an address of the command and the data. The data and the set of parity bits may be stored...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Uribe, Melissa I, Buch, Steffen
Format: Patent
Sprache:eng
Schlagworte:
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