HARDWARE FOR END-TO-END COMMUNICATION PROTECTION IN ASIC

An apparatus comprising communication logic and a memory. The communication logic may be configured to receive a data payload, validate the data payload, decode an instruction from the data payload, generate a bypass signal in response to the instruction and generate a remote signal in response to a...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Islim, Haitham, Wantuck, Ron, Fitzpatrick, John, Gramenos, James
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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