COMPUTATION PROCESSING APPARATUS AND METHOD OF PROCESSING COMPUTATION
A computation processing apparatus that is able to execute threads, the apparatus includes: a cache including ways which respectively include storage areas identified by index addresses; and a processor coupled to the cache and configured to: determine a cache hit; hold a way number and an index add...
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| creator | KAMIKUBO, YUKI Tanomoto, Masakazu |
| description | A computation processing apparatus that is able to execute threads, the apparatus includes: a cache including ways which respectively include storage areas identified by index addresses; and a processor coupled to the cache and configured to: determine a cache hit; hold a way number and an index address which identify a storage area holding target data of an atomic instruction executed by any one of the threads; determine a conflict between instructions in a case where a pair of the way number and the index address match a pair of a way number and an index address that identify a storage area that holds target data of a memory access instruction executed by an other one of the threads;and suppress input and output of the target data of the memory access instruction to and from the cache when determining the conflict. |
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and a processor coupled to the cache and configured to: determine a cache hit; hold a way number and an index address which identify a storage area holding target data of an atomic instruction executed by any one of the threads; determine a conflict between instructions in a case where a pair of the way number and the index address match a pair of a way number and an index address that identify a storage area that holds target data of a memory access instruction executed by an other one of the threads;and suppress input and output of the target data of the memory access instruction to and from the cache when determining the conflict.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230601&DB=EPODOC&CC=US&NR=2023169009A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230601&DB=EPODOC&CC=US&NR=2023169009A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KAMIKUBO, YUKI</creatorcontrib><creatorcontrib>Tanomoto, Masakazu</creatorcontrib><title>COMPUTATION PROCESSING APPARATUS AND METHOD OF PROCESSING COMPUTATION</title><description>A computation processing apparatus that is able to execute threads, the apparatus includes: a cache including ways which respectively include storage areas identified by index addresses; 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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | COMPUTATION PROCESSING APPARATUS AND METHOD OF PROCESSING COMPUTATION |
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