LATCH CIRCUIT, TRANSMISSION CIRCUIT INCLUDING LATCH CIRCUIT, AND SEMICONDUCTOR APPARATUS INCLUDING TRANSMISSION CIRCUIT

The present technology may include a first detection unit configured to generate an output signal by detecting a level of an input terminal in response to a transition of a control clock signal during a normal read operation, and a second detection unit configured to generate the output signal by de...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: CHOI, Eun Ji, SHON, Kwan Su, JEONG, Yo Han, AHN, Keun Seon
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:The present technology may include a first detection unit configured to generate an output signal by detecting a level of an input terminal in response to a transition of a control clock signal during a normal read operation, and a second detection unit configured to generate the output signal by detecting the level of the input terminal regardless of the transition of the control clock signal during a state information read operation.