METHOD FOR DATA SYNCHRONIZATION BETWEEN HOST SIDE AND FPGA ACCELERATOR

METHOD FOR DATA SYNCHRONIZATION BETWEEN HOST SIDE AND FPGA ACCELERATOR

Disclosed are a method for data synchronization between a host side and a Field Programmable Gate Array (FPGA) accelerator, a Bidirectional Memory Synchronize Engine (DMSE), a FPGA accelerator, and a data synchronization system. The method includes: in response to detection of data migration from a...

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Hauptverfasser: FAN, Jiaheng, KAN, Hongwei, OU, Mingyang
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator FAN, Jiaheng
KAN, Hongwei
OU, Mingyang
description Disclosed are a method for data synchronization between a host side and a Field Programmable Gate Array (FPGA) accelerator, a Bidirectional Memory Synchronize Engine (DMSE), a FPGA accelerator, and a data synchronization system. The method includes: in response to detection of data migration from a host side to a preset memory space, generating second state information according to first state information in a first address space, and writing the second state information to a second address space (S201); and in response to detection of the second state information in the second address space, calling Direct Memory Access (DMA) to migrate data in the preset memory space to a memory space of a FPGA accelerator, and copying the second state information to the first address space, so as to implement synchronization (S202).
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title METHOD FOR DATA SYNCHRONIZATION BETWEEN HOST SIDE AND FPGA ACCELERATOR
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