APPARATUS AND METHOD FOR ROLE-BASED REGISTER PROTECTION FOR TDX-IO

Apparatus and method for role-based register protection. For example, one embodiment of an apparatus comprises: one or more processor cores to execute instructions and process data, the one or more processor cores to execute one or more security instructions to protect a virtual machine or trusted a...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: SAHITA, Ravi, SCHMOLE, FILIP, BASAK, ABHISHEK, MAKARAM, RAGHUNANDAN, VAKHARWALA, RUPIN, ALBION, LEE, i wil, Utkarsh Y, SHANBHOGUE, Vedvyas, ABRAHAM, VINIT M
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator SAHITA, Ravi
SCHMOLE, FILIP
BASAK, ABHISHEK
MAKARAM, RAGHUNANDAN
VAKHARWALA, RUPIN
ALBION, LEE
i wil, Utkarsh Y
SHANBHOGUE, Vedvyas
ABRAHAM, VINIT M
description Apparatus and method for role-based register protection. For example, one embodiment of an apparatus comprises: one or more processor cores to execute instructions and process data, the one or more processor cores to execute one or more security instructions to protect a virtual machine or trusted application from a virtual machine monitor (VMM) or operating system (OS); an interconnect fabric to couple the one or more processor cores to a device; and security hardware logic to determine whether to allow a read or write transaction directed to a protected register to proceed over the interconnect fabric, the security hardware logic to evaluate one or more security attributes associated with an initiator of the transaction to make the determination.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2023098288A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2023098288A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2023098288A13</originalsourceid><addsrcrecordid>eNrjZHByDAhwDHIMCQ1WcPRzUfB1DfHwd1Fw8w9SCPL3cdV1cgx2dVEIcnX3DA5xDVIICPIPcXUO8fT3AysJcYnQ9fTnYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBkbGBpYWRhYWjobGxKkCAKSILCM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>APPARATUS AND METHOD FOR ROLE-BASED REGISTER PROTECTION FOR TDX-IO</title><source>esp@cenet</source><creator>SAHITA, Ravi ; SCHMOLE, FILIP ; BASAK, ABHISHEK ; MAKARAM, RAGHUNANDAN ; VAKHARWALA, RUPIN ; ALBION, LEE ; i wil, Utkarsh Y ; SHANBHOGUE, Vedvyas ; ABRAHAM, VINIT M</creator><creatorcontrib>SAHITA, Ravi ; SCHMOLE, FILIP ; BASAK, ABHISHEK ; MAKARAM, RAGHUNANDAN ; VAKHARWALA, RUPIN ; ALBION, LEE ; i wil, Utkarsh Y ; SHANBHOGUE, Vedvyas ; ABRAHAM, VINIT M</creatorcontrib><description>Apparatus and method for role-based register protection. For example, one embodiment of an apparatus comprises: one or more processor cores to execute instructions and process data, the one or more processor cores to execute one or more security instructions to protect a virtual machine or trusted application from a virtual machine monitor (VMM) or operating system (OS); an interconnect fabric to couple the one or more processor cores to a device; and security hardware logic to determine whether to allow a read or write transaction directed to a protected register to proceed over the interconnect fabric, the security hardware logic to evaluate one or more security attributes associated with an initiator of the transaction to make the determination.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230330&amp;DB=EPODOC&amp;CC=US&amp;NR=2023098288A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20230330&amp;DB=EPODOC&amp;CC=US&amp;NR=2023098288A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SAHITA, Ravi</creatorcontrib><creatorcontrib>SCHMOLE, FILIP</creatorcontrib><creatorcontrib>BASAK, ABHISHEK</creatorcontrib><creatorcontrib>MAKARAM, RAGHUNANDAN</creatorcontrib><creatorcontrib>VAKHARWALA, RUPIN</creatorcontrib><creatorcontrib>ALBION, LEE</creatorcontrib><creatorcontrib>i wil, Utkarsh Y</creatorcontrib><creatorcontrib>SHANBHOGUE, Vedvyas</creatorcontrib><creatorcontrib>ABRAHAM, VINIT M</creatorcontrib><title>APPARATUS AND METHOD FOR ROLE-BASED REGISTER PROTECTION FOR TDX-IO</title><description>Apparatus and method for role-based register protection. For example, one embodiment of an apparatus comprises: one or more processor cores to execute instructions and process data, the one or more processor cores to execute one or more security instructions to protect a virtual machine or trusted application from a virtual machine monitor (VMM) or operating system (OS); an interconnect fabric to couple the one or more processor cores to a device; and security hardware logic to determine whether to allow a read or write transaction directed to a protected register to proceed over the interconnect fabric, the security hardware logic to evaluate one or more security attributes associated with an initiator of the transaction to make the determination.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHByDAhwDHIMCQ1WcPRzUfB1DfHwd1Fw8w9SCPL3cdV1cgx2dVEIcnX3DA5xDVIICPIPcXUO8fT3AysJcYnQ9fTnYWBNS8wpTuWF0twMym6uIc4euqkF-fGpxQWJyal5qSXxocFGBkbGBpYWRhYWjobGxKkCAKSILCM</recordid><startdate>20230330</startdate><enddate>20230330</enddate><creator>SAHITA, Ravi</creator><creator>SCHMOLE, FILIP</creator><creator>BASAK, ABHISHEK</creator><creator>MAKARAM, RAGHUNANDAN</creator><creator>VAKHARWALA, RUPIN</creator><creator>ALBION, LEE</creator><creator>i wil, Utkarsh Y</creator><creator>SHANBHOGUE, Vedvyas</creator><creator>ABRAHAM, VINIT M</creator><scope>EVB</scope></search><sort><creationdate>20230330</creationdate><title>APPARATUS AND METHOD FOR ROLE-BASED REGISTER PROTECTION FOR TDX-IO</title><author>SAHITA, Ravi ; SCHMOLE, FILIP ; BASAK, ABHISHEK ; MAKARAM, RAGHUNANDAN ; VAKHARWALA, RUPIN ; ALBION, LEE ; i wil, Utkarsh Y ; SHANBHOGUE, Vedvyas ; ABRAHAM, VINIT M</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2023098288A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>SAHITA, Ravi</creatorcontrib><creatorcontrib>SCHMOLE, FILIP</creatorcontrib><creatorcontrib>BASAK, ABHISHEK</creatorcontrib><creatorcontrib>MAKARAM, RAGHUNANDAN</creatorcontrib><creatorcontrib>VAKHARWALA, RUPIN</creatorcontrib><creatorcontrib>ALBION, LEE</creatorcontrib><creatorcontrib>i wil, Utkarsh Y</creatorcontrib><creatorcontrib>SHANBHOGUE, Vedvyas</creatorcontrib><creatorcontrib>ABRAHAM, VINIT M</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SAHITA, Ravi</au><au>SCHMOLE, FILIP</au><au>BASAK, ABHISHEK</au><au>MAKARAM, RAGHUNANDAN</au><au>VAKHARWALA, RUPIN</au><au>ALBION, LEE</au><au>i wil, Utkarsh Y</au><au>SHANBHOGUE, Vedvyas</au><au>ABRAHAM, VINIT M</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>APPARATUS AND METHOD FOR ROLE-BASED REGISTER PROTECTION FOR TDX-IO</title><date>2023-03-30</date><risdate>2023</risdate><abstract>Apparatus and method for role-based register protection. For example, one embodiment of an apparatus comprises: one or more processor cores to execute instructions and process data, the one or more processor cores to execute one or more security instructions to protect a virtual machine or trusted application from a virtual machine monitor (VMM) or operating system (OS); an interconnect fabric to couple the one or more processor cores to a device; and security hardware logic to determine whether to allow a read or write transaction directed to a protected register to proceed over the interconnect fabric, the security hardware logic to evaluate one or more security attributes associated with an initiator of the transaction to make the determination.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US2023098288A1
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title APPARATUS AND METHOD FOR ROLE-BASED REGISTER PROTECTION FOR TDX-IO
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-08T20%3A22%3A47IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SAHITA,%20Ravi&rft.date=2023-03-30&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2023098288A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true