CLOCK AND PHASE ALIGNMENT BETWEEN PHYSICAL LAYERS AND CONTROLLER

An integrated circuit (IC) for clock and phase aligning and synchronization between physical (PHY) layers and a communications controller is provided. The IC includes a clock multiplier configured to multiply a frequency of the clock signal from a plurality of PHY layers to match a frequency of a cl...

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Bibliographische Detailangaben
Hauptverfasser: CHAU, Benson, AZAD, Sarosh I, KNOPP, Tomai
Format: Patent
Sprache:eng
Schlagworte:
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