CHARGE LOSS COMPENSATION DURING READ OPERATIONS IN A MEMORY DEVICE

CHARGE LOSS COMPENSATION DURING READ OPERATIONS IN A MEMORY DEVICE

Control logic in a memory device initiates a read operation on a memory array of the memory device and performs a calibration operation to detect a change in string resistance in the memory array. The control logic determines whether the change in string resistance is attributable to charge loss in...

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Bibliographische Detailangaben
Hauptverfasser: Piccardi, Michele, Kim, Taehyun, Kalluru, Vivek Venkata, Pekny, Theodore T
Format: Patent
Sprache:eng
Schlagworte:
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Beschreibung
Zusammenfassung:Control logic in a memory device initiates a read operation on a memory array of the memory device and performs a calibration operation to detect a change in string resistance in the memory array. The control logic determines whether the change in string resistance is attributable to charge loss in the memory array, and responsive to determining that the change in string resistance is attributable to charge loss in the memory array, preforms the read operation using calibrated read voltage levels to read data from the memory array.