SHARED UNIT INSTRUCTION EXECUTION
A data processing apparatus comprises receiver circuitry for receiving instructions from each of a plurality of requester devices. Processing circuitry executes the instructions associated with each of a subset of the requester devices at a time and arbitration circuitry determines the subset of the...
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creator | AIRAUD, Cédric Denis Robert PIRY, Frederic Claude Marie MARONCELLI, Luca BONDARENKO, Natalya LACOURBA, Geoffray Matthieu |
description | A data processing apparatus comprises receiver circuitry for receiving instructions from each of a plurality of requester devices. Processing circuitry executes the instructions associated with each of a subset of the requester devices at a time and arbitration circuitry determines the subset of the requester devices and causes the instructions associated with each of the subset of the requester devices to be executed next. In response to the receiver circuitry receiving an instruction of a predetermined type from one of the requester devices outside the subset of requester devices, the arbitration circuitry causes the instruction of the predetermined type to be executed next. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2023042247A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2023042247A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2023042247A13</originalsourceid><addsrcrecordid>eNrjZFAM9nAMcnVRCPXzDFHw9AsOCQp1DvH091NwjXB1DgWxeBhY0xJzilN5oTQ3g7Kba4izh25qQX58anFBYnJqXmpJfGiwkYGRsYGJkZGJuaOhMXGqAL1DI10</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SHARED UNIT INSTRUCTION EXECUTION</title><source>esp@cenet</source><creator>AIRAUD, Cédric Denis Robert ; PIRY, Frederic Claude Marie ; MARONCELLI, Luca ; BONDARENKO, Natalya ; LACOURBA, Geoffray Matthieu</creator><creatorcontrib>AIRAUD, Cédric Denis Robert ; PIRY, Frederic Claude Marie ; MARONCELLI, Luca ; BONDARENKO, Natalya ; LACOURBA, Geoffray Matthieu</creatorcontrib><description>A data processing apparatus comprises receiver circuitry for receiving instructions from each of a plurality of requester devices. Processing circuitry executes the instructions associated with each of a subset of the requester devices at a time and arbitration circuitry determines the subset of the requester devices and causes the instructions associated with each of the subset of the requester devices to be executed next. In response to the receiver circuitry receiving an instruction of a predetermined type from one of the requester devices outside the subset of requester devices, the arbitration circuitry causes the instruction of the predetermined type to be executed next.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2023</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230209&DB=EPODOC&CC=US&NR=2023042247A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25551,76302</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20230209&DB=EPODOC&CC=US&NR=2023042247A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>AIRAUD, Cédric Denis Robert</creatorcontrib><creatorcontrib>PIRY, Frederic Claude Marie</creatorcontrib><creatorcontrib>MARONCELLI, Luca</creatorcontrib><creatorcontrib>BONDARENKO, Natalya</creatorcontrib><creatorcontrib>LACOURBA, Geoffray Matthieu</creatorcontrib><title>SHARED UNIT INSTRUCTION EXECUTION</title><description>A data processing apparatus comprises receiver circuitry for receiving instructions from each of a plurality of requester devices. Processing circuitry executes the instructions associated with each of a subset of the requester devices at a time and arbitration circuitry determines the subset of the requester devices and causes the instructions associated with each of the subset of the requester devices to be executed next. In response to the receiver circuitry receiving an instruction of a predetermined type from one of the requester devices outside the subset of requester devices, the arbitration circuitry causes the instruction of the predetermined type to be executed next.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAM9nAMcnVRCPXzDFHw9AsOCQp1DvH091NwjXB1DgWxeBhY0xJzilN5oTQ3g7Kba4izh25qQX58anFBYnJqXmpJfGiwkYGRsYGJkZGJuaOhMXGqAL1DI10</recordid><startdate>20230209</startdate><enddate>20230209</enddate><creator>AIRAUD, Cédric Denis Robert</creator><creator>PIRY, Frederic Claude Marie</creator><creator>MARONCELLI, Luca</creator><creator>BONDARENKO, Natalya</creator><creator>LACOURBA, Geoffray Matthieu</creator><scope>EVB</scope></search><sort><creationdate>20230209</creationdate><title>SHARED UNIT INSTRUCTION EXECUTION</title><author>AIRAUD, Cédric Denis Robert ; PIRY, Frederic Claude Marie ; MARONCELLI, Luca ; BONDARENKO, Natalya ; LACOURBA, Geoffray Matthieu</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2023042247A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>AIRAUD, Cédric Denis Robert</creatorcontrib><creatorcontrib>PIRY, Frederic Claude Marie</creatorcontrib><creatorcontrib>MARONCELLI, Luca</creatorcontrib><creatorcontrib>BONDARENKO, Natalya</creatorcontrib><creatorcontrib>LACOURBA, Geoffray Matthieu</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>AIRAUD, Cédric Denis Robert</au><au>PIRY, Frederic Claude Marie</au><au>MARONCELLI, Luca</au><au>BONDARENKO, Natalya</au><au>LACOURBA, Geoffray Matthieu</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SHARED UNIT INSTRUCTION EXECUTION</title><date>2023-02-09</date><risdate>2023</risdate><abstract>A data processing apparatus comprises receiver circuitry for receiving instructions from each of a plurality of requester devices. Processing circuitry executes the instructions associated with each of a subset of the requester devices at a time and arbitration circuitry determines the subset of the requester devices and causes the instructions associated with each of the subset of the requester devices to be executed next. In response to the receiver circuitry receiving an instruction of a predetermined type from one of the requester devices outside the subset of requester devices, the arbitration circuitry causes the instruction of the predetermined type to be executed next.</abstract><oa>free_for_read</oa></addata></record> |
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language | eng |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | SHARED UNIT INSTRUCTION EXECUTION |
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